My device is DM6446, os is win7 32bit, ccs3.3, and my work is transport X264 encoding to c64x+ DSP.
Now I face some questions about using cache to optimize my project.
1. why I cannot put code of a function on L1DSRAM, even when I set the space of L1DSRAM as code/data in dsp/bios ( by using code_section() )
2. when the input data is on L1DSRAM, is there benefit to put the relevant function on L2SRAM ?
for example, in the function
static inline void x264_macroblock_cache_ref( x264_t *h, int x, int y, int width, int height, int i_list, int ref ){ int dy, dx; for( dy = 0; dy < height; dy++ ) { for( dx = 0; dx < width; dx++ ) { h->mb.cache.ref[i_list][X264_SCAN8_0+x+dx+8*(y+dy)] = ref; } } }
mb.cache.ref[] is on the L1DSRAM, but when I put the code of this function on L2SRAM instead of the DDR SDRAM, I cannot see any improvement but a worse speed.
why? Should I simultaneity put mb.cache.ref[] on L2SRAM ?
3. Is better to use data_section() than use MEM_alloc() to put the data on the specified memory section?
PS：All the functions mentioned above are used correctly
thanks
Hi Miao ZHANG,
Which version of BIOS are you using?
How are you configuring the cache? Are you setting the MAR bits properly?
Miao ZHANG1. why I cannot put code of a function on L1DSRAM, even when I set the space of L1DSRAM as code/data in dsp/bios ( by using code_section() )
Can you please provide some code snippet of this configuration?
Miao ZHANG3. Is better to use data_section() than use MEM_alloc() to put the data on the specified memory section?
are you referring to the #pragma DATA_SECTION() ? This #pragma is used to place the global data object in the given section instead of the default section .bss. MEM_alloc() is used to dynamically allocate memory off of the heap at run time.
Can you please attach your *.tcf file to this post, as well as your application's *.map file? It will help with understanding your problem and how to solve it.
Steve
First of all, I would like to thank you for your help
Steven Connell Which version of BIOS are you using? How are you configuring the cache? Are you setting the MAR bits properly?
the version of BIOS is 5.33.06, and CCS is 3.3.81.6
And I think I set the MAR bits properly with help of C64x+ Cache.pdf,like
Steven ConnellCan you please provide some code snippet of this configuration?
for examply, I set a section in L1DSRAM in .cmd file:
SECTIONS{
.code: {} > L1DSRAM
}
then I put the a function in this section:
#pragma CODE_SECTION ( function1, ".code");
function1(){
...}
and when the projet runs, italways hangs in function1, and I believe the problem should be using #pragma CODE_SECTION ( function1, ".code") to put code in L1DSRAM.
And I also want to know have you any idea about my question 2 ?
here are the .tcf, .cmd (dm6446cfg.cmd is auto-generated by DSP/BIOS and mylink.cmd is added by myself ) and the .map files8204.tcf_cmd_map.rar
Thanks again
Miao ZHANG: 1. why I cannot put code of a function on L1DSRAM, even when I set the space of L1DSRAM as code/data in dsp/bios ( by using code_section() )
I think you may be trying to place code into L1DSRAM when it is configured as a data cache. L1D cache is only for caching data.
Miao,
L1 is faster than L2 and L2 is faster than SDRAM.
There is only 32KB of memory in L1 that can be RAM/CACHE. Since you specified 32KB for Cache, there is no RAM left there that you can place data.You best bet is to put stuff into the L2 memory.
Judah
If my reply answers your question please mark the thread as answered