This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Beaglebone Black DMA support in uboot

Other Parts Discussed in Thread: AM3359

Hi,

I am interested in adding DMA support in uboot to speed up the booting process.

Before I venture into this project, I have some questions concerning the DMA.


First of all, is the MMC transfer supported by the DMA controller on the AM3359 chip?

If I add the DMA support, what speeds can I expect? (The micron eMMC supports an operating frequency of 52MHz)
Currently, I am getting approximately 9-10 MB/s transfer from the eMMC and SD card.

Side note: It does not matter whether I use the eMMC or the SD card as long as I get a decent performance.

  • Hi Michal,

    The AM335X ROM code boots from MMC in 4-bit mode at up to 10MHz (see AM335X TRM Rev. K section 26.1.7.5.1). Furthermore there are restrictions on the Linux MMC driver too - only 4-bit mode is currently supported: http://processors.wiki.ti.com/index.php/AM335x_MMC/SD_Driver's_Guide

  • Thanks for the info.

    Are there some guidelines on how to use DMA with the eMMC?

    The TRM says the MMC controller can work in DMA slave mode and a request is issued if the following conditions are met:

    -The SD_CMD[0] DE bit is set to 1 to trigger the initial DMA request (the write must be done when
    running the data transfer command).
    -A command was emitted on the SD_cmd line

    My questions more specifically is:

    How do I set up the DMA to receive the requests (channels, events, etc.)?
    How do I set up the MMC to trigger the DMA request? (specific changes from a normal data read)

    Thanks

    Michal

  • I was able to get the DMA to work in U-boot. It allows me to transfer data over 10MBps (~14MBps)

    The transfer is initiated by an event mapped from the MMC controller (25 for rx event from MMC0).
    However, I now have this problem:

    The interrupt bit in IPR/ IPRH is never set when the transfer is complete.

    I have enabled the corresponding interrupt bit (TCC code in OPT) for IER using IESR. I even set them all to one.

    In OPT, I have set the TCINTEN bit in OPT of my param. I have tried both TCCMODE early and normal, and no change.

    I am not using an ISR; instead, I am polling IPR until IPR is no longer 0.

    Am I missing something?

  • I can tell when the transfer is complete by looking at the TC bit in the SD_STAT register of the MMC interface.

    With EDMA and transfer mode set to 8 bits on the eMMC, I am now getting 26.7MB/s during boot-up.

  • wow, that a pretty good achievement, really admire the hard work, do you have any plans to share the patches??

  • I do not believe using DMA will really speed up boot time by much if you are loading from eMMC or SD card as the bottle neck is not the transfer time but the flash read/seek time. I would be interested in seeing some real numbers.
  • Unfortunately, I cannot provide you with the details for the DMA because I am bound by a non-disclosure agreement. What I can tell you is that I used the Linux driver and adapted it to uBoot. You first need to find where the "memcpy" occurs in the boot loader and modify that code to use the DMA. There are a lot of layers to go through.

    As for the bottleneck question, our goal was to achieve starting the kernel in less than 10 seconds. Our image size was over 100MB, and therefore, the DMA speedup does make a difference. With the original uBoot, this would take more than 10 seconds. Now, we can transfer the whole image in less than 4.Our average transfer speed is 23MB/s in it depends on the location of the image. (The speed changes because the way we setup the DMA, it can only transfer big blocks of data (4K if my memory is correct). If the beginning of the data doesn't start precisely at the beginning of a block, we need to do a memcpy which uses the CPU ressources. The same applies to the end of the data.)

    So if your image is very small like the original, don't bother with these changes. Otherwise, it's worth taking a look.

  • So you didn't say where your image is stored. I agree DMA would greatly help if you are transferring memory to memory. But if you are loading your image from SD or eMMC its not going to help much in the big picture.
  • The kernel is transfered from the eMMC to RAM during boot-up. We achieved a max speed of 27MB/s but the average is around 22-23MB//s. Speeds from SD to RAM are slower because we are limited by the 4 bits transfer.
  • 27MB/s is standard SDIO transfer speed but that does not account for eMMC/SD read access time which is the real bottle neck. It does not matter how fast you transfer the data if you can not get it that fast.