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multicore multiple linux instance boot

Yusuf Kara
Prodigy 40 points

You know keystone 2 series multicore SOIC contains 4 ARM cores  and we can use them with SMP  linux kernel. I can disable SMP support from kconfig and change the device tree structure for each kernel . But exactly I did not find any example that show how to boot multiple linux kernels from single u-boot. Also for multicore only one arm core is the master at first. This master core enables the other cores to run.


I think u-boot must do some extra stuff on the master core and load all kernel+filesystem and DTS to the memory for other linux instances  and run them. Is it possible to do this ?  

   

  • 0
    TI__Mastermind 43955 points

    Hi Yusuf kara,

    Yusuf says said:
    But exactly I did not find any example that show how to boot multiple linux kernels from single u-boot.

    As SMP linux kernel is used, you need not boot multiple linux kernels on ARM cores.One single booting is enough.

    Yusuf said:
    Also for multicore only one arm core is the master at first. This master core enables the other cores to run.

    The boot sequence of the primary and the secondary cores are given at http://processors.wiki.ti.com/index.php/MCSDK_UG_Chapter_Exploring#Boot_Monitor_2

    Yusuf said:
    I think u-boot must do some extra stuff on the master core and load all kernel+filesystem and DTS to the memory for other linux instances  and run them. Is it possible to do this ?  

    You will burn the u-boot into SPI/NAND and boot u-boot to load kernel, dtb and root filesystem.

    Regards,

    Shankari

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  • 0 in reply to Shankari G
    Prodigy 40 points

    Thank you for your response.

    I am trying to use 4 ARM cores in AMP mode. So I want to run multiple linux instances on core 0 and core 1 seperately. Because of this I disabled SMP support from kconfig. And genereate different DTS for each kernel.

    Regards,

    Yusuf

  • 0 in reply to Yusuf Kara
    TI__Guru* 81335 points

    Hi Yusuf,

    It may be possible in real world using embedded virtualization. I referred below link,

    http://embeddedintel.com/technology_applications.php?article=1832

    You need to do lot of changes to achieve this. The current MCSDK released for Keystone II does not support your case. 

    With the current MCSDK supported system, ARM Core 0 runs the u-boot and boot monitor. The boot monitor wakes up all the secondary ARM cores and then SMP linux kernel is executed on top. 

    You shall download the different kernel image for each secondary core and wake up by writing boot magic address and generate interrupt from ARM core 0. 

    The key points to be handled by you in this case are:

    1. Managing the resources across cores. Actually, SMP kernel does the resource management across all ( ARMs +DSPs ) the cores successfully; But, it is because you disable the SMP, the resource management should be taken care. Please refer below link for more information.

    http://processors.wiki.ti.com/index.php/MCSDK_UG_Chapter_Developing_System_Mgmt#Resource_Manager

    2. Debugging across the ARM & DSP cores.

    Thank you.