Hi ,
We are using BBB(am335x) based custom board.
Boot device for board is SPI NOR flash i.e. SPL resides in the SPI NOR flash.
We had created four partitions in the SPI NOR flash (128k bytes each) and we were expecting that if first partition doesn't contain the valid SPL copy then ROM code would try next partition as it does for NAND Flash.
But during experiment we found that ROM code actually doesn't go to next partition.
While referring TRM of AM335x we found that ROM Code checks 4 sectors(1 sector = 512 bytes) for valid SPL.
(TRM section : 26.1.7.6.3 SPI Read Sector Procedure).
BUt another section of the TRM says for SPI NOr also ROM code checks 4 blocks.
(TRM section : 26.1.7.7 Blocks and Sectors Search Summary).
Now i have following question regarding this.
1. If ROM code checks 4 blocks for SPI NOR flash, what is the size of the block. Is block size equal to sector size(512 bytes)
2. Is there any way to maintain multiple copies of SPL in SPI NOR and ROM code goes checking all the copies of SPL in SPI NOR before going to Next device?
Thank you,
Regards,
Ankur