How to read the global timer in OMAP 4430?

I am trying to read the global system timer for Cortex A9, OMAP 4430 architecture (pandaboard rev A6). I used this OMAP 4430 TRM where is said that register of global timer has this base address 0x48240600 with offset 0x200. Is it correct address for system timer? Now when I try to map and read this addresses, I always get 0 and it seems to me that something is wrong.

Earlier I could managed the same issue with beaglebone board (AM335x architecture). There were different registers, different addresses, but I hoped that the idea of reading the timer would be the same. That's way I am asking, may be there are some additional tricks of reading this register for OMAP 4430?

To be more precise, this is the way how I read counter:

#define MAP_SIZE 4096UL
#define MAP_MASK (MAP_SIZE - 1)
volatile unsigned char* gpt_regs;

constexpr uint32_t GPTimer = 0x48240600;
constexpr uint32_t offset = 0x200;

int32_t fd;

if ( (fd=open("/dev/mem", O_RDWR|O_SYNC) ) < 0)
{
perror("open");
exit(-1);
}

gpt_regs = (unsigned char*) mmap(0, MAP_SIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, GPTimer & ~MAP_MASK);
uint32_t counter1 = * (int32_t*) ( gpt_regs + offset);

I will appreciate any help.