This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

U-Boot Hangs

Other Parts Discussed in Thread: AM5728, DRA752

Hii,

      We have developed our customized board with AM5728 processor and while booting from memory card on the console i am getting the below messages and stops. What can be the reason?

OMAP SD/MMC: 0<CR><LF>
reading u-boot.img<CR><LF>
reading u-boot.img<CR><LF>
<CR><LF>
<CR><LF>
U-Boot 2013.04 (Jun 25 2015 - 19:30:24)<CR><LF>
<CR><LF>
CPU  : DRA752 ES1.1<CR><LF>
Board: DRA7xx<CR><LF>
I2C:   ready<CR><LF>
DRAM:  1.5 GiB<CR><LF>
WARNING: Caches not enabled<CR><LF>
MMOMAP SD/MMC: 0, OMAP SD/MMC: 1<CR><LF>
Using default environment<CR><LF>
<CR><LF>

The same u-boot code is working fine with EVM. After debugging u-boot code i have found that after printing puts("Using default environment\n\n");

it hangs in the function

himport_r(&env_htab, (char *)default_environment, sizeof(default_environment), '\0', flags, 0, NULL).

||

hsearch_r(e, ENTER, &rv, htab, flag)

||

env_flags_init(&htab->table[idx].entry);  ------------------ Hangs here, in this function

What can be the possible reasons and soluions?

Thanks & Regards,

Ganesh

  • Hi,
    What are all the changes on your custom board than EVM ?
    Different RAM make, flash device etc., ?
  • HI Titus,

    We are using same DDR memory as EVM, the hw changes from EVM are we have used MMC3 for eMMC instead of MMC2, and addition of some serial ports only.

    NOR Flash we are using 128MB.

    But what can be the reasons for hanging at the hash functions? Please check the sequence where it exactly hangs i have mentioned in the question?

    Thanks & Regards
    Ganesh

  • Hi Ganesh,
    What other env variables are you using, and have you modified the set_default_env(const char *s) in env_common file?
    Regards,
    Boyko
  • Hi Boyko,

    I have not modified any environment variables. We are using same u-boot code given with the SDK . But the code hangs before u-boot prompt.

    Thanks & Regards
    Ganesh

  • Hello,

    can you try with adding this config and see it boots up CONFIG_ENV_IS_NOWHERE ?
    also try increasing the malloc len in the config file.

    Cheers,
    --Prabhakar Lad
  • Hello Prabhakar,

    Already CONFIG_ENV_IS_NOWHERE is enabled in config file. Earlier CONFIG_SYS_SPL_MALLOC_SIZE=0x100000, i have incresed the size to 0x100FFF. But still u-boot hangs after,
    reading u-boot.img<CR><LF>
    reading u-boot.img<CR><LF>.
    But why you suspect malloc size, as the same u-boot code is working fine with EVM.

    Thanks & Regards,
    Ganesh
  • I have also tried with latest SDK, ti-glsdk_dra7xx-evm_7_00_00_04 with this SDK,

    U-Boot SPL 2014.07 (Mar 01 2015 - 23:34:51)<CR><LF>
    DRA572 ES 1.1
    reading args
    spl_load_image_fat_os: error reading image args, err -1
    reading u-boot.img<CR><LF>
    reading u-boot.img<CR><LF>
    After this again u-boot hangs.

    Previously i tried with ti-glsdk_dra7xx-evm_6_10_00_02 ..
    Please tell what can be the problem.

    Thanks & Regards,
    Ganesh
  • The DDR cycle time that i have used in my board is 1.25ns and in the EVM it is 1.5ns. Can it effect? Where i need to modify for this only SDRAM_TIMING1 register only?Please someone have a look at this .  I am having very less time for target date..

    Thanks & Regards
    Ganesh

  • I have changed the following in the sdram.c for my DDR3L-1600,( as the u-boot code is for DDR3L-1066)
    const struct emif_regs emif_1_regs_ddr3_532_mhz_1cs_dra_es1 = {
    .sdram_config_init = 0x61873AB2,
    .sdram_config = 0x61873AB2,
    .sdram_config2 = 0x08000000,
    .ref_ctrl = 0x00001860,
    /* REFRESH_RATE @ init is (500us x 800MHz)/16 */
    .ref_ctrl_init = 0x000061A8,/*Check once*//*61A8*/
    .sdram_tim1 = 0xF557B9FD,
    .sdram_tim2 = 0x40877FEB,
    .sdram_tim3 = 0x029F87F8,
    .read_idle_ctrl = 0x00050000,
    .zq_config = 0x0007190B,
    .temp_alert_config = 0x00000000,
    .emif_ddr_phy_ctlr_1_init = 0x00244013,
    .emif_ddr_phy_ctlr_1 = 0x00244013,
    .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
    .emif_ddr_ext_phy_ctrl_2 = 0x009E009E,
    .emif_ddr_ext_phy_ctrl_3 = 0x009E009E,
    .emif_ddr_ext_phy_ctrl_4 = 0x009E009E,
    .emif_ddr_ext_phy_ctrl_5 = 0x009E009E,
    .emif_rd_wr_lvl_rmp_win = 0x00000000,
    .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
    .emif_rd_wr_lvl_ctl = 0x00000000,
    .emif_rd_wr_exec_thresh = 0x00000305
    };

    const struct emif_regs emif_2_regs_ddr3_532_mhz_1cs_dra_es1 = {
    .sdram_config_init = 0x61873B32,
    .sdram_config = 0x61873B32,
    .sdram_config2 = 0x08000000,
    .ref_ctrl = 0x00001860,
    /* REFRESH_RATE @ init is (500us x 800MHz)/16 */
    .ref_ctrl_init = 0x000061A8,
    .sdram_tim1 = 0xF557B9ED,
    .sdram_tim2 = 0x40877FEB,
    .sdram_tim3 = 0x029F87F8,
    .read_idle_ctrl = 0x00050000,
    .zq_config = 0x0007190B,
    .temp_alert_config = 0x00000000,
    .emif_ddr_phy_ctlr_1_init = 0x00244013,
    .emif_ddr_phy_ctlr_1 = 0x00244013,
    .emif_ddr_ext_phy_ctrl_1 = 0x04040100,
    .emif_ddr_ext_phy_ctrl_2 = 0x00000000,
    .emif_ddr_ext_phy_ctrl_3 = 0x00000000,
    .emif_ddr_ext_phy_ctrl_4 = 0x00000000,
    .emif_ddr_ext_phy_ctrl_5 = 0x00000000,
    .emif_rd_wr_lvl_rmp_win = 0x00000000,
    .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
    .emif_rd_wr_lvl_ctl = 0x00000000,
    .emif_rd_wr_exec_thresh = 0x00000305
    };

    Is still any changes required please let me know.

    Thanks & Regards,
    Ganesh