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power management state transitions

ranchu
Guru 20755 points

Hello,

When I get into retention using omap3550 I see in serial that the usage counter is keep incremented even when there is no activity on serial:

~ # cat /sys/devices/system/cpu/cpu0/cpuidle/state4/usage
131

---- here we are waiting for a long time without doing any activity in serial ---------------

~ # cat /sys/devices/system/cpu/cpu0/cpuidle/state4/usage
910

It seems that the cpu gets in and out of retention even when there is no activity in serial !

What can cause such strange behaviour ? 

I would expect it to get into the deeper state and stay there without getting in and out all these time.

Regards,

Ran

  • 0
    TI__Guru** 116100 points
    Dear Ran,
    How did you initiate the retention mode ?
    What is the exact power saving mode you are using (retention) ?
    Deep sleep or DDR self refresh ? etc.,
  • 0 in reply to Titusrathinaraj Stalin
    Guru 20755 points
    Hi,

    In my case enable_off_mode is off , which should mean that retention is the deepest power mode:

    To allow/ prevent transition to OFF mode:
    $ echo 1 > /dbg/pm_debug/enable_off_mode
    $ echo 0 > /dbg/pm_debug/enable_off_mode

    I also validated in counters that only C4 counter is incremented (C5-C7 is zero)

    C-states in OMAP3
    State Description
    C1 MPU WFI + Core active
    C2 MPU WFI + Core inactive
    C3 MPU RET + Core inactive
    C4 MPU OFF + Core inactive
    C5 MPU RET + CORE RET
    C6 MPU OFF + CORE RET
    C7 MPU OFF + CORE OFF

    The only question is why it is kept incremented periodically. I suspect that it is some thread/task that gets the cpu in and out of idle ?

    I actually prefer that the cpu shall decide to get from deeper state out only if in a period of some seconds there is no activity, in order to prevent this very fast context switch between sleep and power on modes.

    Regards,
    Ran