CMEM / Beaglebone Black

Chris Pendleton

I recently came across this post: https://e2e.ti.com/support/embedded/linux/f/354/t/500780, and it helped me to utilize CMEM to set up a shared buffer for Linux/ARM and PRUSS. It works nicely, but I don't understand why!

This is the command to set up the CMEM pool:

modprobe cmemk phys_start=0xa0000000 phys_end=0xc0000000 pools=1x536870912 allowOverlap=1

It has the physical address range 0xa0000000 to 0xc0000000, but the BBB only has 512MB DDR starting at 0x80000000. What does 0xa0000000 map to? I am obviously missing something.

Thanks,

Chris

over 7 years ago

0 Kemal R. Shakir over 7 years ago

TI__Guru 55345 points

Hello Chris,

If you convert the created buffer 536870912 bytes to hex, it will be 0x20000000 and if you take out 0x20000000 from 0xc0000000 you will find the 0xa0000000.
The information and the examples on these pages may help you.
processors.wiki.ti.com/.../CMEM_Overview
software-dl.ti.com/.../cmem_8h.html

For example, on most TI processor-based systems the kernel's memory starts at 0x80000000 and ends at (0x80000000 + #M), so a CMEM block starting at 0x1000 would be detected as overlapping since the beginning location of that block is not greater than the end location of the kernel's memory. To allow this situation, cmemk.ko should be inserted using "allowOverlap=1"

Best regards,
Kemal

0 Chris Pendleton over 7 years ago in reply to Kemal R. Shakir

Intellectual 410 points

Hi Kemal.

I follow most of your response, but I am still not there. In my specific example of the AM335x/BBB, 512MB DDR (‭0x1E848000‬) starts at 0x80000000. So the "end" physical address should be 0x80000000 + 0x1E848000 = 0x‭9E848000‬.

So how can CMEM specify a physical start address of 0xa0000000 if the "end" physical address is at 0x‭9E848000?

Or is CMEM actually simulating a physical address at 0xa0000000?

0 Cvetolin Shulev-XID over 7 years ago in reply to Chris Pendleton

TI__Guru 65405 points

Hi Chris,

The phys_start and phys_end addresses which you are using for arguments of CMEM seems are out of range of AM335x/BBB and the size of configured memory pool seem larger the the whole BBB physical DDR memory but when using allowOverlap=1 option it is not a problem.
You can find explanation of this issue at:
processors.wiki.ti.com/.../Codec_Engine_FAQ

BR
Tsvetolin Shulev

0 Kemal R. Shakir over 7 years ago in reply to Cvetolin Shulev-XID

TI__Guru 55345 points

512MiB is 0x20000000, not 0x1E848000, you should also have one more 0 in the 0x8000000 address.

0 Chris Pendleton over 7 years ago in reply to Kemal R. Shakir

Intellectual 410 points

You are correct about the 0x80000000 typo. My conversion has 0x20000000 = ‭536,870,912, but that is 512MB.

Thanks for your help,

Chris

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CMEM / Beaglebone Black