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Linux/AM5728: GPIO5 not accessible from the DSP1 core with Linux running on the AM5728

Part Number: AM5728

Tool/software: Linux

Hi,

I get the following error when I try to access and GPIO5 register from the DSP1 core after loading the firmware using rpmsg with Linux running on the A15 side. I am running TI-RTOS on the DSP1 core.

[ 1709.580351] WARNING: CPU: 0 PID: 0 at /opt/PHYTEC_BSPs/yocto_ti/build/arago-tmp-external-linaro-toolchain/work-shared/am57xx-phycore-rdk/kernel-source/drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x25c/0x368()

[ 1709.599555] 44000000.ocp:L3 Custom Error: MASTER DSP1_MDMA TARGET L4_PER1_P3 (Read): Data Access in User mode during Functional access

[ 1709.611690] Modules linked in: bc_example(O) sha512_generic sha512_arm sha1_generic sha1_arm_neon sha1_arm md5 cbc sha256_generic sha256_arm hmac drbg xfrm_user xfrm4_tunnel ipcomp xfrm_ipcomp esp4 ah4 rpmsg_proto af_key rpmsg_rpc xfrm_algo rpmsg_pru bluetooth dwc3 pruss_intc udc_core virtio_rpmsg_bus snd_soc_simple_card pru_rproc pvrsrvkm(O) omap_wdt pruss omap_aes_driver ahci_platform libahci_platform libahci c_can_platform omap_sham ti_vpe c_can ti_sc libata ti_vpdma dwc3_omap snd_soc_tlv320aic3x rtc_omap extcon_palmas can_dev omap_rng extcon rng_core omap_des rtc_palmas omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel gdbserverproxy(O) cryptodev(O) cmemk(O)

[ 1709.671910] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G        W  O    4.4.12 #3

[ 1709.679076] Hardware name: Generic DRA74X (Flattened Device Tree)

[ 1709.685193] Backtrace:

[ 1709.687665] [<c00130a4>] (dump_backtrace) from [<c00132a0>] (show_stack+0x18/0x1c)

[ 1709.695264]  r7:c02e2d18 r6:20080193 r5:00000000 r4:c09d318c

[ 1709.700988] [<c0013288>] (show_stack) from [<c02b6aa8>] (dump_stack+0x90/0xa4)

[ 1709.708247] [<c02b6a18>] (dump_stack) from [<c003387c>] (warn_slowpath_common+0x88/0xb8)

[ 1709.716369]  r7:c02e2d18 r6:00000093 r5:00000009 r4:c09b5d30

[ 1709.722090] [<c00337f4>] (warn_slowpath_common) from [<c00338e4>] (warn_slowpath_fmt+0x38/0x40)

[ 1709.730822]  r8:00000016 r7:c08af0a4 r6:00000002 r5:c08aec6c r4:c08aed10

[ 1709.737597] [<c00338b0>] (warn_slowpath_fmt) from [<c02e2d18>] (l3_interrupt_handler+0x25c/0x368)

[ 1709.746503]  r3:ee1affc0 r2:c08aed10

[ 1709.750104]  r4:80080003

[ 1709.752660] [<c02e2abc>] (l3_interrupt_handler) from [<c0077b30>] (handle_irq_event_percpu+0xb4/0x160)

[ 1709.762003]  r10:c0a02d2d r9:ee1b03c0 r8:00000016 r7:00000000 r6:00000000 r5:ee1b0420

[ 1709.769905]  r4:ee1b6440

[ 1709.772457] [<c0077a7c>] (handle_irq_event_percpu) from [<c0077c1c>] (handle_irq_event+0x40/0x64)

[ 1709.781365]  r10:c09b64d0 r9:c06e91e4 r8:ee008000 r7:00000000 r6:c09d33e4 r5:ee1b0420

[ 1709.789264]  r4:ee1b03c0

[ 1709.791816] [<c0077bdc>] (handle_irq_event) from [<c007af54>] (handle_fasteoi_irq+0xc0/0x194)

[ 1709.800374]  r7:00000000 r6:c09d33e4 r5:ee1b0420 r4:ee1b03c0

[ 1709.806094] [<c007ae94>] (handle_fasteoi_irq) from [<c007715c>] (generic_handle_irq+0x2c/0x3c)

[ 1709.814739]  r7:00000000 r6:00000000 r5:00000016 r4:c09b0424

[ 1709.820455] [<c0077130>] (generic_handle_irq) from [<c0077434>] (__handle_domain_irq+0x64/0xbc)

[ 1709.829192] [<c00773d0>] (__handle_domain_irq) from [<c000948c>] (gic_handle_irq+0x40/0x7c)

[ 1709.837576]  r9:c06e91e4 r8:fa213000 r7:fa212000 r6:c09b5ef0 r5:fa21200c r4:c09b6868

[ 1709.845393] [<c000944c>] (gic_handle_irq) from [<c0013d80>] (__irq_svc+0x40/0x74)

[ 1709.852906] Exception stack(0xc09b5ef0 to 0xc09b5f38)

[ 1709.857978] 5ee0:                                     00000001 00000000 fe600000 00000000

[ 1709.866192] 5f00: c09b4000 c09b6484 00000000 00000000 c09b5f60 c06e91e4 c09b64d0 c09b5f4c

[ 1709.874403] 5f20: c09b5f2c c09b5f40 c00268f4 c0010540 60080013 ffffffff

[ 1709.881042]  r9:c06e91e4 r8:c09b5f60 r7:c09b5f24 r6:ffffffff r5:60080013 r4:c0010540

[ 1709.888865] [<c0010518>] (arch_cpu_idle) from [<c006d8d8>] (default_idle_call+0x28/0x34)

[ 1709.896993] [<c006d8b0>] (default_idle_call) from [<c006db3c>] (cpu_startup_entry+0x204/0x264)

[ 1709.905645] [<c006d938>] (cpu_startup_entry) from [<c06df500>] (rest_init+0x90/0x94)

[ 1709.913417]  r7:00000000

[ 1709.915972] [<c06df470>] (rest_init) from [<c095dd88>] (start_kernel+0x400/0x40c)

[ 1709.923483]  r5:c0a05000 r4:c0a05040

[ 1709.927093] [<c095d988>] (start_kernel) from [<80008090>] (0x80008090)

[ 1709.933646] ---[ end trace 19bf9735e7555446 ]---

 Please can you let me know what could be wrong here?

Thanks very much.

Regards,

Shaunak

  • Hi Shaunak,

    Make sure that GPIO5 is enabled in the device PRCM and that you are using the correct address. Do you use PROCESSOR-SDK-LINUX-AM57X or PROCESSOR-SDK-RTOS-AM57X?

    See also if the below pointers will be in help:

    e2e.ti.com/.../1973628
    e2e.ti.com/.../437761
    e2e.ti.com/.../373803

    Regards,
    Pavel
  • Hi Pavel,

    Thanks for your response. I am using Processor SDK RTOS and developing for the DSP1 core.

    Please could you give me a brief of how I could enable GPIO5 module?

    Thanks very much.

    Regards,

    Shaunak

  • Shaunak,

    Check register CM_L4PER_GPIO5_CLKCTRL (0x4A009778) just before you try to access GPIO5 module. [1:0] MODULEMODE should be different than 0x0, [17:16] IDLEST should be 0x0.

    Regards,
    Pavel
  • Hi Pavel,

    I wrote 0x101 to 0x4a009778 but I always end up with the IDLEST bits being 0x02.

    Please could you let me know what wrong I could be doing?

    Thanks very much.

    Regards,

    Shaunak

  • Shaunak,

    Can you try to write 0x001 instead of 0x101, any difference?

    Regards,
    Pavel
  • Shaunak,

    Can you also write 0x2 in CM_L4PER_CLKSTCTRL[1:0] CLKTRCTRL (0x4a009700). In CCS6 GEL file (ccsv6/ccs_base/emulation/gel/DRA75x_DRA74x/DRA7xx_prcm_config.gel) we have the below sequence:

    #define L4PER_CM_CORE                                                                      0x4a009700

    #define L4PER_CM_CORE__CM_L4PER_CLKSTCTRL                         0x000ul

    #define L4PER_CM_CORE__CM_L4PER_GPIO5_CLKCTRL                 0x078ul

    #define SW_WKUP         (0x2)

    #define MODE_AUTO     (0x1)

     

    prcm_set_clkdomain_state(L4PER_CM_CORE,     L4PER_CM_CORE__CM_L4PER_CLKSTCTRL,      SW_WKUP );

    prcm_set_module_mode(L4PER_CM_CORE,     L4PER_CM_CORE__CM_L4PER_GPIO5_CLKCTRL,          MODE_AUTO,      0x00000000, 0x00000000  );

     

    prcm_set_clkdomain_state(uint32_t module_base, uint32_t module_offset, uint32_t state)

    {

       uint32_t reg_val;

       uint32_t timeout = CLKSTCTRL_TIMEOUOT;

       if (DEBUG_PRINT)

       {

           GEL_TextOut("module_base:   %x\n",,,,, module_base);

           GEL_TextOut("module_offset: %x\n",,,,, module_offset);

       }

       reg_val = RD_MEM_32(module_base+module_offset);

       WR_MEM_32(module_base+module_offset, ((reg_val & ~(0x3)) | (state & 0x3)));

    }

     

    prcm_set_module_mode(uint32_t module_base, uint32_t module_offset, uint32_t mode, uint32_t extrabits, uint32_t extrabitsMask)

    {

       uint32_t reg_val;

       uint32_t timeout = CLKCTRL_TIMEOUOT;

       if (DEBUG_PRINT)

       {

           GEL_TextOut("module_base:   %x\n",,,,, module_base);

           GEL_TextOut("module_offset: %x\n",,,,, module_offset);

       }

       reg_val = RD_MEM_32(module_base + module_offset) & ~(extrabitsMask | 0x00000003);

       WR_MEM_32(module_base+module_offset, (reg_val | (extrabits & extrabitsMask) | (mode & 0x3)));

       if (DEBUG_PRINT)

       {

           GEL_TextOut("\tWaiting for module IDLE status....\n");

       }

       while(((RD_MEM_32(module_base + module_offset) & 0x00030000) != 0) && (timeout>0))

       {

           timeout--;

       }

       if (timeout==0)

       {

           GEL_TextOut("module_base:   %x\n",,,,, module_base);

           GEL_TextOut("module_offset: %x\n",,,,, module_offset);

           GEL_TextOut("\tTIMEOUT\n");

       }

       else

       {

           if (DEBUG_PRINT)

           {

               GEL_TextOut("\tDONE\n");

           }

       }

    }

     

    Note also that we have some time waiting for the the IDLE status to become active.


    Regards,
    Pavel

  • Hi Pavel,
    This worked for me. Thanks very much.
    I configured GPIO2 similarly. I then configured GPIO2_2 as input and am triggering a software interrupt using
    GPIOTriggerPinInt(GPIO_BASE_ADDR, 0, GPIO_LED_PIN);
    GPIO_BASE_ADDR = (0x48055000U)
    GPIO_LED_PIN = 0x02

    I get the following on the Linux console:
    [ 408.989728] ------------[ cut here ]------------
    [ 408.994379] WARNING: CPU: 0 PID: 0 at /opt/PHYTEC_BSPs/yocto_ti/build/arago-tmp-external-linaro-toolchain/work-shared/am57xx-phycore-rdk/kernel-source/drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x25c/0x368()
    [ 409.013582] 44000000.ocp:L3 Custom Error: MASTER DSP1_MDMA TARGET L4_PER1_P3 (Idle): Data Access in User mode during Functional access
    [ 409.025715] Modules linked in: rpmsg_proto bc_example(O) sha512_generic sha512_arm sha1_generic sha1_arm_neon sha1_arm md5 cbc sha256_generic sha256_arm hmac drbg xfrm_user xfrm4_tunnel ipcomp xfrm_ipcomp esp4 ah4 bluetooth af_key xfrm_algo virtio_rpmsg_bus pruss_intc snd_soc_omap_hdmi_audio omap_wdt omap_aes_driver pru_rproc pvrsrvkm(O) pruss omap_sham ti_vpe dwc3_omap ti_sc ti_vpdma extcon rtc_omap rtc_palmas omap_rng omap_des rng_core omap_remoteproc remoteproc virtio virtio_ring sch_fq_codel gdbserverproxy(O) cryptodev(O) cmemk(O)
    [ 409.073659] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W O 4.4.12 #8
    [ 409.080823] Hardware name: Generic DRA74X (Flattened Device Tree)
    [ 409.086938] Backtrace:
    [ 409.089412] [<c00130a4>] (dump_backtrace) from [<c00132a0>] (show_stack+0x18/0x1c)
    [ 409.097011] r7:c02e2d18 r6:200f0193 r5:00000000 r4:c09d318c
    [ 409.102736] [<c0013288>] (show_stack) from [<c02b6aa8>] (dump_stack+0x90/0xa4)
    [ 409.109998] [<c02b6a18>] (dump_stack) from [<c003387c>] (warn_slowpath_common+0x88/0xb8)
    [ 409.118121] r7:c02e2d18 r6:00000093 r5:00000009 r4:c09b5d30
    [ 409.123845] [<c00337f4>] (warn_slowpath_common) from [<c00338e4>] (warn_slowpath_fmt+0x38/0x40)
    [ 409.132578] r8:00000017 r7:c08af0a4 r6:00000000 r5:c08aec6c r4:c08aed10
    [ 409.139354] [<c00338b0>] (warn_slowpath_fmt) from [<c02e2d18>] (l3_interrupt_handler+0x25c/0x368)
    [ 409.148261] r3:ee1b6140 r2:c08aed10
    [ 409.151862] r4:80080003
    [ 409.154419] [<c02e2abc>] (l3_interrupt_handler) from [<c0077b30>] (handle_irq_event_percpu+0xb4/0x160)
    [ 409.163763] r10:c0a02d2d r9:ee1b0480 r8:00000017 r7:00000000 r6:00000000 r5:ee1b04e0
    [ 409.171666] r4:ee1b6640
    [ 409.174219] [<c0077a7c>] (handle_irq_event_percpu) from [<c0077c1c>] (handle_irq_event+0x40/0x64)
    [ 409.183126] r10:c09b64d0 r9:c06e91e4 r8:ee008000 r7:00000000 r6:c09bc08c r5:ee1b04e0
    [ 409.191027] r4:ee1b0480
    [ 409.193581] [<c0077bdc>] (handle_irq_event) from [<c007af54>] (handle_fasteoi_irq+0xc0/0x194)
    [ 409.202139] r7:00000000 r6:c09bc08c r5:ee1b04e0 r4:ee1b0480
    [ 409.207856] [<c007ae94>] (handle_fasteoi_irq) from [<c007715c>] (generic_handle_irq+0x2c/0x3c)
    [ 409.216502] r7:00000000 r6:00000000 r5:00000017 r4:c09b0424
    [ 409.222221] [<c0077130>] (generic_handle_irq) from [<c0077434>] (__handle_domain_irq+0x64/0xbc)
    [ 409.230961] [<c00773d0>] (__handle_domain_irq) from [<c000948c>] (gic_handle_irq+0x40/0x7c)
    [ 409.239344] r9:c06e91e4 r8:fa213000 r7:fa212000 r6:c09b5ef0 r5:fa21200c r4:c09b6868
    [ 409.247166] [<c000944c>] (gic_handle_irq) from [<c0013d80>] (__irq_svc+0x40/0x74)
    [ 409.254678] Exception stack(0xc09b5ef0 to 0xc09b5f38)
    [ 409.259750] 5ee0: 00000001 00000000 fe600000 00000000
    [ 409.267963] 5f00: c09b4000 c09b6484 00000000 00000000 c09b5f60 c06e91e4 c09b64d0 c09b5f4c
    [ 409.276177] 5f20: c09b5f2c c09b5f40 c00268f4 c0010540 600f0013 ffffffff
    [ 409.282816] r9:c06e91e4 r8:c09b5f60 r7:c09b5f24 r6:ffffffff r5:600f0013 r4:c0010540
    [ 409.290640] [<c0010518>] (arch_cpu_idle) from [<c006d8d8>] (default_idle_call+0x28/0x34)
    [ 409.298769] [<c006d8b0>] (default_idle_call) from [<c006db3c>] (cpu_startup_entry+0x204/0x264)
    [ 409.307419] [<c006d938>] (cpu_startup_entry) from [<c06df500>] (rest_init+0x90/0x94)
    [ 409.315192] r7:00000000
    [ 409.317747] [<c06df470>] (rest_init) from [<c095dd88>] (start_kernel+0x400/0x40c)
    [ 409.325259] r5:c0a05000 r4:c0a05040
    [ 409.328866] [<c095d988>] (start_kernel) from [<80008090>] (0x80008090)
    [ 409.335420] ---[ end trace c5f33a20b59aa006 ]---

    I can configure the same I/O as an output and it works well.
    I have configured that DSP1 IRQ crossbar as follows
    *(CTRL_CORE_DSP1_IRQ_56_57) &= ~(DSP1_IRQ_56);
    *(CTRL_CORE_DSP1_IRQ_56_57) |= ENABLE_GPIO2_INT_VECTOR;

    #define ENABLE_GPIO2_INT_VECTOR 0x00000019
    #define DSP1_IRQ_56 0x000001FF

    Also I am using the following APIs to enable the interrupt
    /* Set the callback function */
    GPIO_setCallback(USER_LED0, AppGpioCallbackFxn);

    /* Enable GPIO interrupt on the specific gpio pin */
    GPIO_enableInt(USER_LED0);

    USER_LED0 corresponds to gpio2_2

    Any suggestions?

    Thanks very much.

    Regards,
    Shaunak
  • Shaunak Shilimkan said:
    Any suggestions?

    I can suggest you to open new e2e thread regarding your new issue.


    Regards,
    Pavel