I am currently working with the DM6437 speech_encdec project from dvsdk 1_11_00_00 and I'm hoping someone can help me with some DMA issues I'm having.
The project at first comes up fine and runs without a problem. I then added some QDMA transfers which appear to cause the DMA working for the Mcbsp to no longer work(I never receive a semaphore back). This is only after just doing the setup, not even calling the actual transfer.
I then changed my code to use regular DMA's instead of QDMA's. Once this was done the Mcbsp didnt have any issues with making the DMA setup calls. However, now when i actually perform the DMA transfer the MCbsp stops responding.
I believe the DMA's are setup correctly since i have another project where they run fine in which i am attempting to move the audio code into. If I disable the task making the DMA calls in that code the audio works fine. If I leave them up the rest of the project runs fine except for the audio (no return semaphore).
Any help or points in the right direction with this would be greatly appreciated. My code for the DMA setup i am currently using is as follows:
transChIn = 20;
edmaResult = setupDMAchannel( (IMAGER_RES_HORZ_1*2), 0x0001, 0x01, NULL, NULL, NULL, NULL,
EDMA3_DRV_SYNC_A, &transChIn, &tccCodeIn, 0 , (EDMA3_RM_TccCallback) tccCb);
transChOut = 22;
edmaResult = setupDMAchannel( (IMAGER_RES_HORZ_1*2), 0x0001, 0x01, NULL, NULL, NULL, NULL,
EDMA3_DRV_SYNC_A, &transChOut, &tccCodeOut, 0 , (EDMA3_RM_TccCallback) tccCb);
transChAE = 21;
edmaResult = setupDMAchannel( 1, IMAGER_RES_HORZ_1/2, 0x01, 4, 1, NULL,NULL,
EDMA3_DRV_SYNC_AB, &transChAE, &tccCodeAE, 1,(EDMA3_RM_TccCallback) tccCb);
EDMA3_DRV_Result setupDMAchannel(Uint16 acnt, Uint16 bcnt, Uint16 ccnt, Int16 srcbidx, Int16 desbidx, Int16 srccidx, Int16 descidx,
EDMA3_DRV_SyncType syncType, Uint32 *pchan_ID, Uint32 *ptcc_code, EDMA3_RM_EventQueue queueNum,EDMA3_RM_TccCallback tccCb)
{
EDMA3_DRV_Result result = EDMA3_DRV_SOK;
Uint32 BRCnt = bcnt;
/* Setup for any DMA Channel */
//*pchan_ID = EDMA3_DRV_QDMA_CHANNEL_ANY;
*ptcc_code = EDMA3_DRV_TCC_ANY;
//Request any open DMA Channel
if (result == EDMA3_DRV_SOK)
{
result = EDMA3_DRV_requestChannel (hEdma, pchan_ID, ptcc_code,
queueNum, NULL,
NULL);
}
if (result == EDMA3_DRV_SOK)
{
/* Set DMA Trigger Word as Source Address */
// result = EDMA3_DRV_setQdmaTrigWord (hEdma, *pchan_ID,
// (EDMA3_RM_QdmaTrigWord)trigword);
}
if (result == EDMA3_DRV_SOK)
{
result = EDMA3_DRV_setSrcIndex (hEdma, *pchan_ID, srcbidx, srccidx);
}
if (result == EDMA3_DRV_SOK)
{
result = EDMA3_DRV_setDestIndex (hEdma, *pchan_ID, desbidx, descidx);
}
if (result == EDMA3_DRV_SOK)
{
if (syncType == EDMA3_DRV_SYNC_A)
{
result = EDMA3_DRV_setTransferParams (hEdma, *pchan_ID, acnt, bcnt,
ccnt, BRCnt, EDMA3_DRV_SYNC_A);
}
else
{
/* AB Sync Transfer Mode */
result = EDMA3_DRV_setTransferParams (hEdma, *pchan_ID, acnt, bcnt,
ccnt, BRCnt, EDMA3_DRV_SYNC_AB);
}
}
if (result == EDMA3_DRV_SOK)
{
/* Enable Transfer Completion Interrupt */
result = EDMA3_DRV_setOptField (hEdma, *pchan_ID,
(EDMA3_DRV_OPT_FIELD_TCINTEN), 1u);
}
if (result == EDMA3_DRV_SOK)
{
/* Enable Transfer Completion Interrupt */
result = EDMA3_DRV_setOptField (hEdma, *pchan_ID,
(EDMA3_DRV_OPT_FIELD_ITCCHEN), 1u);
}
if (result == EDMA3_DRV_SOK)
{
/* Enable Intermediate Transfer Completion Interrupt */
// result = EDMA3_DRV_setOptField (hEdma, *pchan_ID,
// EDMA3_DRV_OPT_FIELD_ITCINTEN, 1u);
}
if (result == EDMA3_DRV_SOK)
{
/* Enable Intermediate Transfer Completion Interrupt */
// result = EDMA3_DRV_setOptField (hEdma, *pchan_ID,
// EDMA3_DRV_OPT_FIELD_TCCHEN, 1u);
}
if (result == EDMA3_DRV_SOK)
{
/* Set TCC code for chaining */
result = EDMA3_DRV_setOptField (hEdma, *pchan_ID,
EDMA3_DRV_OPT_FIELD_TCC, *ptcc_code);
}
if (result == EDMA3_DRV_SOK)
{
/* Set Source Transfer Mode as Increment Mode. */
result = EDMA3_DRV_setOptField (hEdma, *pchan_ID, EDMA3_DRV_OPT_FIELD_SAM,
EDMA3_DRV_ADDR_MODE_INCR);
}
if (result == EDMA3_DRV_SOK)
{
/* Set Destination Transfer Mode as Increment Mode. */
result = EDMA3_DRV_setOptField (hEdma, *pchan_ID, EDMA3_DRV_OPT_FIELD_DAM,
EDMA3_DRV_ADDR_MODE_INCR);
}
if (result == EDMA3_DRV_SOK)
{
/**
* Since OPT.STATIC field should be SET for isolated QDMA
* transfers or for the final transfer in a linked list of QDMA
* transfers, do the needful for the last request.
*/
result = EDMA3_DRV_setOptField (hEdma, *pchan_ID,
EDMA3_DRV_OPT_FIELD_STATIC, 0u);
}
return result;
}
Thanks,
Mark
