I am writing a device driver for an FPGA connected to the GPMC bus. I have adapted the smsc911x device driver for my FPGA device driver. However, the smsc911x is a network device driver and the FPGA is a character driver i believe. I have implemented the read/write callbacks using the readw/writew providing the virtual addresses map to the GPMC CS7 connected to the FPGA. However, i cannot find a way of specifying the read/write callbacks that will be called back when the user-space program calls the read/write function to the driver. In the smsc911x this is done using an instance of the net device driver framework. Can anyone provide a bit of an insight that could help me. Thanks
While registering driver you must pass "file_operations" structure with read, write and other operations. There are tons of pages available on internet on "How to write Char driver in Linux", google is the best tool here.
You are brave to write a network driver. Never done it myself. The complexity is much higher than a char driver. The defacto reference is here:http://lwn.net/Kernel/LDD3/Linux Device Drivers, Third EditionCHAPTER 17 Network DriversSince your driver would look like a network driver, you would probably have to use sockets to access it from user space.If you want to switch to a char driver, Helmut Forren has some bare minimal code down that could be adapted to your purposes:http://e2e.ti.com/support/embedded/f/354/t/104258.aspx
Thanks for your response. It is not so much the issue of writing a Char Device driver but a GPMC Device Driver. Like you recommended there are examples on writing a char driver on the internet. Writing the GPMC driver using the platform device driver framework is what's causing me some headache.
Why do you think writing driver for GPMC is so different than writing for other char drivers? I may not understand your concern here unless I understand what are you trying to achieve here. Once you configure the GPMC with required timing parameters and base address, thats it, you should be able to access external FPGA as normal memory mapped peripheral.
Can you share with us some boiler template file for creating a GPMC driver that communicates with a FPGA?
I'm learning about the use of GPMC bus and hope to see some real example to better understand the underlaying from GPMC setting to platform device driver to simple test application to validate the system.
Many thanks in adv.
I too am confused on this issue.
I think I am able to configure the GPMC to the way I would think it should work, something like this: https://groups.google.com/forum/?fromgroups#!topic/beagleboard/cFgfEEYp19k
But then, how do you actually do a read or write? I had thought that setting the CSVALID bit of GPMC_CONFIG7_i might do it, but I don't see any activity on the bus with my scope.
The problem I was having here was that I had to set the correct base address and memory size in CONFIG reg 7. Once done, reading and writing is as simple as reading and writing to pointer at the correct memory location (in my case, address 0x00100000).
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