Hello,
Per OMAPL138 datasheet , the External Memory Interface A (EMIFA) has up to 6 chip selects EMA_CS[5:0] where EMA_CS[5:2} for Async Memory.
In other MPUs, each chip select has its own set of config registers, like wait state, memory range, ...
But, I'm not able to find such info for OMAPL138!
Could you tell me where to find it ?
Thanks,
~Duy-Ky
I found memory map in soc_OMAPL138.h
Duy-Ky,
I'm glad that you found what you were looking for in the SOC header file. This information should also be documented in the OMAP-L138 technical reference manual (TRM). Let me know if you have any additional questions.
Please click the Verify Answer button on this post if it answers your question.
Hello Joe,
I did check that document and double check after your email, but still not able to find such info.
The document is big, so I pay a lot attention to the chapters of EMIFA, and System Memory, but not the rest.
I may miss something.
Thanks so much, Joe
The EMIF does provide configuration registers for controlling strobe timings, bus width etc. Please check the spruh77a.pdf (TRM) on the TI website. It is provide in section 20.4. You must be interested in the CE2CFG-CE5CFG registers.
Also, there is a SoC guide, sprs586d.pdf. This gives a top level view of what's on the SoC. Here refer to section 2.5. You will find the Memory map for the ARM, DSP, DMA and other subsytems. This does provide EMIFA related memory map (data registers).
Hope this helps...
Regards,
Madhvapathi Sriram
Thanks and regards,
Hello Madhvapathi,
I belived this info must be in omapl138.pdf, so I did serach in that file, unfortunately I missed it
Now I re0serach and find it in the Memory Map table as I expected, but missed before!!!
It really helps
Thanks so much for your great help