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Bad REG_SEL_SHIFT defines in hw_tps65910.h

Other Parts Discussed in Thread: TPS65910

Hi,

Some of the voltage selection defines in hw_tps65910.h seem to be wrong:

#define PMIC_VAUX1_REG_SEL_SHIFT (0x00u)
#define PMIC_VAUX2_REG_SEL_SHIFT (0x00u)
#define PMIC_VAUX33_REG_SEL_SHIFT (0x00u)
#define PMIC_VMMC_REG_SEL_SHIFT (0x00u)
#define PMIC_VPLL_REG_SEL_SHIFT (0x00u)
#define PMIC_VDAC_REG_SEL_SHIFT (0x00u)

According to the TRM the SEL field occupies bits 3:2 so the shift value should be 2:

#define PMIC_VAUX1_REG_SEL_SHIFT (0x02u)
#define PMIC_VAUX2_REG_SEL_SHIFT (0x02u)
#define PMIC_VAUX33_REG_SEL_SHIFT (0x02u)
#define PMIC_VMMC_REG_SEL_SHIFT (0x02u)
#define PMIC_VPLL_REG_SEL_SHIFT (0x02u)
#define PMIC_VDAC_REG_SEL_SHIFT (0x02u)

Thanks,

Orjan