Hi,
I use am3354BZCZI00 on my board. I have ported am335x-evm-sdk-src-06.00.00.00 bsp to my borad and the kernel is 3.2.0.Now ,I have a trouble with suspend/resuem. When let board go to deepsleep0,I cann't wake up it.The master oscillator (OSC0) doesn't go off and DDR CKE signal goes low on suspend. When I press wake up key(connected to GPIO0_2), DDR CKE doesn't go high. Where can I download Cortex M3 firware sources and compile environment? follows is log about clockdomain ,powerdomain and clocks before calling am33xx_do_wfi_sram(&suspend_cfg_param_list[0]) in am33xx_do_sram_idle().
clockdomain flags _flags usecount
[ 48.993352] clkdms_status_query name=l4_cefuse_clkdm flags=0x13 _flags=0x0 usecount=0
[ 49.004171] clkdms_status_query name=gfx_l4ls_gfx_clkdm flags=0x13 _flags=0x0 usecount=0
[ 49.014990] clkdms_status_query name=gfx_l3_clkdm flags=0x13 _flags=0x0 usecount=0
[ 49.025809] clkdms_status_query name=l4_rtc_clkdm flags=0x13 _flags=0x0 usecount=1
[ 49.036627] clkdms_status_query name=mpu_clkdm flags=0x13 _flags=0x0 usecount=1
[ 49.047446] clkdms_status_query name=l4_wkup_aon_clkdm flags=0x13 _flags=0x0 usecount=3
[ 49.058265] clkdms_status_query name=l3_aon_clkdm flags=0x13 _flags=0x0 usecount=0
[ 49.069083] clkdms_status_query name=l4_wkup_clkdm flags=0x13 _flags=0x0 usecount=3
[ 49.079902] clkdms_status_query name=clk_24mhz_clkdm flags=0x13 _flags=0x0 usecount=1
[ 49.090720] clkdms_status_query name=lcdc_clkdm flags=0x13 _flags=0x0 usecount=0
[ 49.101539] clkdms_status_query name=cpsw_125mhz_clkdm flags=0x13 _flags=0x0 usecount=0
[ 49.112357] clkdms_status_query name=pruss_ocp_clkdm flags=0x13 _flags=0x0 usecount=0
[ 49.123175] clkdms_status_query name=ocpwp_l3_clkdm flags=0x13 _flags=0x0 usecount=0
[ 49.133994] clkdms_status_query name=l4hs_clkdm flags=0x13 _flags=0x0 usecount=1
[ 49.144812] clkdms_status_query name=l3_clkdm flags=0x13 _flags=0x0 usecount=4
[ 49.155631] clkdms_status_query name=l4fw_clkdm flags=0x13 _flags=0x0 usecount=2
[ 49.166449] clkdms_status_query name=l3s_clkdm flags=0x13 _flags=0x0 usecount=0
[ 49.177268] clkdms_status_query name=l4ls_clkdm flags=0x13 _flags=0x0 usecount=8
clockdomain pwrstst_reg pwrstctrl_reg
[ 49.143930] pwrdm_status_query name=cefuse_pwrdm pwrstatus=0x0 ctrl=0x0
[ 49.152205] pwrdm_status_query name=mpu_pwrdm pwrstatus=0x3 ctrl=0x3
[ 49.160208] pwrdm_status_query name=per_pwrdm pwrstatus=0x3 ctrl=0x3
[ 49.168211] pwrdm_status_query name=wkup_pwrdm pwrstatus=0x0 ctrl=0x0
[ 49.176305] pwrdm_status_query name=rtc_pwrdm pwrstatus=0x0 ctrl=0x0
[ 49.184308] pwrdm_status_query name=gfx_pwrdm pwrstatus=0x0 ctrl=0x0
clock name parent clockdomain rate usecount
[ 49.247554] ehrpwm2_tbclk none noclkdm 0 1
[ 49.258646] ehrpwm1_tbclk none noclkdm 0 1
[ 49.269737] ehrpwm0_tbclk none noclkdm 0 1
[ 49.280828] vtp_clk sys_clkin_ck noclkdm 12000000 0
[ 49.291921] timer7_ick l4ls_gclk noclkdm 100000000 1
[ 49.303012] timer6_ick l4ls_gclk noclkdm 100000000 1
[ 49.314104] timer5_ick l4ls_gclk noclkdm 100000000 1
[ 49.325195] timer4_ick l4ls_gclk noclkdm 100000000 1
[ 49.336286] timer3_ick l4ls_gclk noclkdm 100000000 1
[ 49.347378] timer2_ick l4ls_gclk noclkdm 100000000 1
[ 49.358469] timer1_ick l4_wkup_gclk noclkdm 100000000 1
[ 49.369561] timer0_ick l4_wkup_gclk noclkdm 100000000 1
[ 49.380652] clkout2_ck sysclkout_pre_ck noclkdm 32768 1
[ 49.391744] sysclkout_pre_ck clk_32768_ck noclkdm 32768 1
[ 49.402835] gfx_ick gfx_l3_gclk gfx_l3_clkdm 200000000 0
[ 49.413927] gfx_fclk gfx_fclk_clksel_ck gfx_l3_clkdm 200000000 0
[ 49.425018] gfx_fclk_clksel_ck sysclk1_ck noclkdm 200000000 0
[ 49.436110] mmc_clk per_192mhz_clk noclkdm 96000000 0
[ 49.447201] lcd_gclk per_192mhz_clk noclkdm 192000000 0
[ 49.458293] gpio3_dbclk clkdiv32k_ick l4ls_clkdm 32768 0
[ 49.469384] gpio2_dbclk clkdiv32k_ick l4ls_clkdm 32768 0
[ 49.480475] gpio1_dbclk clkdiv32k_ick l4ls_clkdm 32768 0
[ 49.491567] gpio0_dbclk gpio0_dbclk_mux_ck l4_wkup_clkdm 32000 0
[ 49.502659] gpio0_dbclk_mux_ck clk_rc32k_ck l4_wkup_clkdm 32000 0
[ 49.513750] cpsw_cpts_rft_clk dpll_core_m5_ck l3_clkdm 250000000 0
[ 49.524842] cpsw_5mhz_clk cpsw_50mhz_clk l4hs_clkdm 5000000 0
[ 49.535933] cpsw_50mhz_clk sysclk2_ck l4hs_clkdm 50000000 0
[ 49.547025] cpsw_125mhz_gclk sysclk2_ck cpsw_125mhz_clkdm 125000000 0
[ 49.558116] cpsw_250mhz_clk sysclk2_ck l4hs_clkdm 250000000 0
[ 49.569207] sysclk_div_ck dpll_core_m4_ck noclkdm 200000000 0
[ 49.580299] clk_24mhz per_192mhz_clk noclkdm 24000000 1
[ 49.591390] debug_clka_gclk sysclk1_ck noclkdm 200000000 0
[ 49.602481] l4ls_gclk core_100mhz_ck l4ls_clkdm 100000000 27
[ 49.613663] l4fw_gclk core_100mhz_ck noclkdm 100000000 1
[ 49.624755] l3s_gclk core_100mhz_ck noclkdm 100000000 2
[ 49.635846] l4hs_gclk sysclk1_ck noclkdm 200000000 1
[ 49.646937] l4_wkup_gclk sysclk1_ck noclkdm 100000000 5
[ 49.658028] gfx_l3_gclk sysclk1_ck gfx_l3_clkdm 200000000 0
[ 49.669120] l3_gclk sysclk1_ck noclkdm 200000000 3
[ 49.680211] l4_rtc_gclk sysclk1_ck noclkdm 100000000 0
[ 49.691303] l4_wkup_aon_gclk sysclk1_ck l4_wkup_aon_clkdm 200000000 2
[ 49.702394] l3_aon_gclk sysclk1_ck noclkdm 200000000 0
[ 49.713486] wkup_m3_fck l4_wkup_aon_gclk l4_wkup_aon_clkdm 200000000 1
[ 49.724577] wdt1_fck clk_rc32k_ck l4_wkup_clkdm 32000 0
[ 49.735668] wdt1_ick l4_wkup_gclk noclkdm 100000000 0
[ 49.746759] wdt0_fck clk_rc32k_ck l4_wkup_clkdm 32000 0
[ 49.757851] wdt0_ick l4_wkup_gclk noclkdm 100000000 0
[ 49.768942] usbotg_fck usb_pll_clk l3s_clkdm 960000000 0
[ 49.780034] usbotg_ick l3s_gclk l3s_clkdm 100000000 0
[ 49.791125] uart6_ick l4ls_gclk noclkdm 100000000 1
[ 49.802216] uart5_ick l4ls_gclk noclkdm 100000000 1
[ 49.813308] uart4_ick l4ls_gclk noclkdm 100000000 1
[ 49.824399] uart3_ick l4ls_gclk noclkdm 100000000 1
[ 49.835490] uart2_ick l4ls_gclk noclkdm 100000000 1
[ 49.846582] uart1_ick l4_wkup_gclk noclkdm 100000000 1
[ 49.857673] uart6_fck per_192mhz_clk l4ls_clkdm 48000000 0
[ 49.868764] uart5_fck per_192mhz_clk l4ls_clkdm 48000000 0
[ 49.879856] uart4_fck per_192mhz_clk l4ls_clkdm 48000000 0
[ 49.890947] uart3_fck per_192mhz_clk l4ls_clkdm 48000000 0
[ 49.902039] uart2_fck per_192mhz_clk l4ls_clkdm 48000000 0
[ 49.913130] uart1_fck per_192mhz_clk l4_wkup_clkdm 48000000 1
[ 49.924221] tptc2_ick l3_gclk l3_clkdm 200000000 0
[ 49.935313] tptc1_ick l3_gclk l3_clkdm 200000000 0
[ 49.946404] tptc0_ick l3_gclk l3_clkdm 200000000 0
[ 49.957495] tpcc_ick l3_gclk l3_clkdm 200000000 0
[ 49.968586] lcdc_ick sysclk1_ck l3_clkdm 200000000 0
[ 49.979678] timer7_fck sys_clkin_ck l4ls_clkdm 24000000 0
[ 49.990769] timer6_fck sys_clkin_ck l4ls_clkdm 24000000 0
[ 50.001860] timer5_fck sys_clkin_ck l4ls_clkdm 24000000 0
[ 50.012952] timer4_fck sys_clkin_ck l4ls_clkdm 24000000 0
[ 50.024043] timer3_fck sys_clkin_ck l4ls_clkdm 24000000 0
[ 50.035134] timer2_fck sys_clkin_ck l4ls_clkdm 24000000 0
[ 50.046225] timer1_fck sys_clkin_ck l4ls_clkdm 24000000 1
[ 50.057317] timer0_fck clk_rc32k_ck l4_wkup_clkdm 32000 0
[ 50.068408] spinlock_fck l4ls_gclk l4ls_clkdm 100000000 0
[ 50.079500] spi1_ick l4ls_gclk noclkdm 100000000 1
[ 50.090591] spi0_ick l4ls_gclk noclkdm 100000000 1
[ 50.101682] spi1_fck per_192mhz_clk l4ls_clkdm 48000000 0
[ 50.112773] spi0_fck per_192mhz_clk l4ls_clkdm 48000000 0
[ 50.123865] smartreflex1_ick l4_wkup_gclk noclkdm 100000000 0
[ 50.134956] smartreflex1_fck sys_clkin_ck l4_wkup_clkdm 24000000 0
[ 50.146048] smartreflex0_ick l4_wkup_gclk noclkdm 100000000 0
[ 50.157139] smartreflex0_fck sys_clkin_ck l4_wkup_clkdm 24000000 0
[ 50.168230] sha0_fck l3_gclk l3_clkdm 200000000 0
[ 50.179322] rtc_ick l4_rtc_gclk noclkdm 100000000 0
[ 50.190413] rtc_fck clk_32768_ck l4_rtc_clkdm 32768 1
[ 50.201504] rng_fck l4ls_gclk l4ls_clkdm 100000000 0
[ 50.212595] pka_fck l4ls_gclk l4ls_clkdm 100000000 0
[ 50.223687] ocpwp_fck l4ls_gclk l4ls_clkdm 100000000 0
[ 50.234778] ocmcram_ick l3_gclk l3_clkdm 200000000 1
[ 50.245869] mmu_fck gfx_l3_gclk gfx_l3_clkdm 200000000 0
[ 50.256961] mmc2_fck mmc_clk l3s_clkdm 96000000 0
[ 50.268052] mmc1_fck mmc_clk l4ls_clkdm 96000000 0
[ 50.279143] mmc0_fck mmc_clk l4ls_clkdm 96000000 0
[ 50.290235] mmc2_ick l4ls_gclk noclkdm 100000000 1
[ 50.301326] mmc1_ick l4ls_gclk noclkdm 100000000 1
[ 50.312417] mmc0_ick l4ls_gclk noclkdm 100000000 1
[ 50.323508] mlb_fck sysclk_div_ck l3_clkdm 200000000 0
[ 50.334600] mcasp1_fck sys_clkin_ck l3s_clkdm 24000000 0
[ 50.345691] mcasp1_ick l3s_gclk noclkdm 100000000 1
[ 50.356783] mcasp0_fck sys_clkin_ck l3s_clkdm 24000000 0
[ 50.367874] mcasp0_ick l3s_gclk noclkdm 100000000 1
[ 50.378966] mailbox0_fck l4ls_gclk l4ls_clkdm 100000000 0
[ 50.390057] lcdc_fck lcd_gclk lcdc_clkdm 192000000 0
[ 50.401148] l4ls_ick l4ls_gclk l4ls_clkdm 100000000 1
[ 50.412240] l4fw_ick core_100mhz_ck l4fw_clkdm 100000000 1
[ 50.423331] l4wkup_ick l4_wkup_aon_gclk l4_wkup_aon_clkdm 200000000 1
[ 50.434423] l4hs_ick l4hs_gclk l4hs_clkdm 200000000 1
[ 50.445514] ieee5000_fck l3s_gclk l3s_clkdm 100000000 0
[ 50.456605] pruss_iep_gclk l3_gclk pruss_ocp_clkdm 200000000 0
[ 50.467697] pruss_uart_gclk per_192mhz_clk pruss_ocp_clkdm 192000000 0
[ 50.478788] pruss_ocp_gclk l3_gclk noclkdm 200000000 0
[ 50.489879] i2c3_ick l4ls_gclk l4ls_clkdm 100000000 0
[ 50.500971] i2c3_fck per_192mhz_clk l4ls_clkdm 48000000 0
[ 50.512062] i2c2_ick l4ls_gclk l4ls_clkdm 100000000 0
[ 50.523153] i2c2_fck per_192mhz_clk l4ls_clkdm 48000000 0
[ 50.534245] i2c1_ick l4_wkup_gclk l4_wkup_clkdm 100000000 0
[ 50.545336] i2c1_fck per_192mhz_clk l4_wkup_clkdm 48000000 0
[ 50.556428] gpmc_fck l3s_gclk l3s_clkdm 100000000 0
[ 50.567519] gpio3_ick l4ls_gclk l4ls_clkdm 100000000 1
[ 50.578610] gpio2_ick l4ls_gclk l4ls_clkdm 100000000 1
[ 50.589702] gpio1_ick l4ls_gclk l4ls_clkdm 100000000 1
[ 50.600793] gpio0_ick l4_wkup_gclk l4_wkup_clkdm 100000000 0
[ 50.611885] epwmss2_fck l4ls_gclk l4ls_clkdm 100000000 0
[ 50.622976] epwmss1_fck l4ls_gclk l4ls_clkdm 100000000 0
[ 50.634067] epwmss0_fck l4ls_gclk l4ls_clkdm 100000000 0
[ 50.645158] elm_fck l4ls_gclk l4ls_clkdm 100000000 0
[ 50.656250] debugss_ick l3_aon_gclk l3_aon_clkdm 200000000 0
[ 50.667341] dcan1_ick l4ls_gclk l4ls_clkdm 100000000 1
[ 50.678432] dcan0_ick l4ls_gclk l4ls_clkdm 100000000 1
[ 50.689524] dcan1_fck sys_clkin_ck l4ls_clkdm 24000000 0
[ 50.700615] dcan0_fck sys_clkin_ck l4ls_clkdm 24000000 0
[ 50.711707] cpgmac0_ick cpsw_125mhz_gclk cpsw_125mhz_clkdm 125000000 0
[ 50.722798] control_fck l4_wkup_gclk l4_wkup_clkdm 100000000 1
[ 50.733889] clkdiv32k_ick clk_24mhz clk_24mhz_clkdm 32768 1
[ 50.744980] cefuse_iclk l4_cefsue_gclk l4_cefuse_clkdm 100000000 0
[ 50.756072] cefuse_fck sys_clkin_ck l4_cefuse_clkdm 24000000 0
[ 50.767163] l4_cefsue_gclk core_100mhz_ck noclkdm 100000000 0
[ 50.778254] aes0_fck l3_gclk l3_clkdm 200000000 0
[ 50.789346] adc_tsc_ick l4_wkup_gclk l4_wkup_clkdm 100000000 1
[ 50.800437] adc_tsc_fck sys_clkin_ck l4_wkup_clkdm 24000000 0
[ 50.811528] l3_instr_ick l3_gclk l3_clkdm 200000000 1
[ 50.822620] l3_ick l3_gclk l3_clkdm 200000000 1
[ 50.833711] core_100mhz_ck sysclk1_ck noclkdm 100000000 4
[ 50.844802] usb_pll_clk dpll_per_ck noclkdm 960000000 0
[ 50.855894] per_192mhz_clk dpll_per_m2_ck noclkdm 192000000 2
[ 50.866985] dpll_per_m2_ck dpll_per_ck noclkdm 192000000 1
[ 50.878076] dpll_per_ck sys_clkin_ck noclkdm 960000000 1
[ 50.889168] disp_pll_clk dpll_disp_m2_ck noclkdm 300000000 0
[ 50.900259] dpll_disp_m2_ck dpll_disp_ck noclkdm 300000000 0
[ 50.911350] dpll_disp_ck sys_clkin_ck noclkdm 300000000 0
[ 50.922442] emif_fw_fck l4fw_gclk l4fw_clkdm 100000000 1
[ 50.933533] emif_fck ddr_pll_clk l3_clkdm 200000000 1
[ 50.944624] ddr_pll_clk dpll_ddr_m2_ck noclkdm 400000000 1
[ 50.955716] dpll_ddr_m2_ck dpll_ddr_ck noclkdm 400000000 1
[ 50.966807] dpll_ddr_ck sys_clkin_ck noclkdm 400000000 1
[ 50.977898] mpu_fck dpll_mpu_m2_ck mpu_clkdm 1000000000 1
[ 50.988990] dpll_mpu_m2_ck dpll_mpu_ck noclkdm 1000000000 1
[ 51.000081] dpll_mpu_ck sys_clkin_ck noclkdm 1000000000 1
[ 51.011173] clk_32khz_timer clk_32khz_ck noclkdm 32768 0
[ 51.022264] core_clk_out dpll_core_m4_ck noclkdm 200000000 0
[ 51.033355] sysclk2_ck dpll_core_m5_ck noclkdm 250000000 0
[ 51.044446] sysclk1_ck dpll_core_m4_ck noclkdm 200000000 5
[ 51.055537] dpll_core_m6_ck dpll_core_x2_ck noclkdm 2000000000 0
[ 51.066629] dpll_core_m5_ck dpll_core_x2_ck noclkdm 250000000 0
[ 51.077720] dpll_core_m4_ck dpll_core_x2_ck noclkdm 200000000 1
[ 51.088811] dpll_core_x2_ck dpll_core_ck noclkdm 2000000000 1
[ 51.099902] dpll_core_ck sys_clkin_ck noclkdm 1000000000 1
[ 51.110993] tclkin_ck none noclkdm 12000000 0
[ 51.122085] sys_clkin_ck virt_24m_ck noclkdm 24000000 5
[ 51.133176] virt_26m_ck none noclkdm 26000000 0
[ 51.144268] virt_25m_ck none noclkdm 25000000 0
[ 51.155359] virt_24m_ck none noclkdm 24000000 1
[ 51.166450] virt_19_2m_ck none noclkdm 19200000 0
[ 51.177541] clk_rc32k_ck none noclkdm 32000 0
[ 51.188632] clk_32khz_ck clkdiv32k_ick clk_24mhz_clkdm 32768 0
[ 51.199723] clk_32768_ck none noclkdm 32768 2
