GPIO_IRQSTATUS(n) clarification

Lubomir Bogdanov1

Hello, guys!

I have a question regarding the macro

#define GPIO_IRQSTATUS(n) (0x2C + (n * 4))

from AM335X_StarterWare_xx_xx_xx_xx/include/hw/hw_gpio_v2.h. Where does this formula come from? I can see in the TRM that the 0x2C is the offset of the register GPIO_IRQSTATUS0 but why do we have the (n * 4)?

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Also why do we have two sets of some registers (e.g. GPIO_IRQSTATUS0 and GPIO_IRQSTATUS1)? I read that it has something to do with PRU-ICSS and WakeM3 but I see no explanation of it ...

Thanks in advance!

over 9 years ago

0 Madana Jyothi Kiran over 9 years ago

TI__Intellectual 870 points

Hi Lubomir Bogdanov,

Each GPIO module contains two interrupt lines, and it can be configured to generate interrupt on any of these lines. So all the interrupt related registers will be in sets of two. For ex: {GPIO_IRQSTATUS_RAW_0, GPIO_IRQSTATUS_RAW_1}, {GPIO_IRQSTATUS_0, GPIO_IRQSTATUS_1}, {GPIO_IRQSTATUS_SET_0, GPIO_IRQSTATUS_SET_1}.

Regarding definition of macros, for the ease of programming, the above pairs of macros are combined into single macro and the offset will be derived from the input parameter which will be signfiying the interrupt line that needs to be used.

In the case of above macro the following two macros are combined and formed as single macro:

i. #define GPIO_IRQSTATUS_0 0x2C

ii #define GPIO_IRQSTATUS_1 0x30

Regards,

M.Jyothi Kiran