Simultaneous capture on multiple ADC channels in AM335x starterware

Hi All,

Subsequent to my previous question on using multiple ADC channels simultaneously, i read the AM335x datasheet and figured out few things. Each ADC channel has a separate step config and step delay register where you can specify the channel specific parameters. Also there are 2 fifo's which can be associated with any of the 8 channels which holds the converted data and also we can configure a single interrupt for ADC data.

Now i have the following questions.
1. If i configure 6 simultaneous channels and configure fifo 0 for 3 channels and fifo 1 for remaining 3 and if there is simultaneous data in fifo, how do i know for which channel the data corresponds to?
2. why there are 16 step registers even though there are only 8 ADC channels?

Please suggest?

Hey! Sram:
It's me again! Because I am waiting my answer.
Maybe I can share my experence for the function
/* ADC is configured */
static void ADCConfigure(void)
{
/* Enable the clock for touch screen */
TSCADCModuleClkConfig();

TSCADCPinMuxSetUp();

/* Configures ADC to 3Mhz */
TSCADCConfigureAFEClock(SOC_ADC_TSC_0_REGS, 24000000, 3000000);

/* Enable Transistor bias */
TSCADCTSTransistorConfig(SOC_ADC_TSC_0_REGS, TSCADC_TRANSISTOR_ENABLE);

TSCADCStepIDTagConfig(SOC_ADC_TSC_0_REGS, 1);

/* Disable Write Protection of Step Configuration regs*/
TSCADCStepConfigProtectionDisable(SOC_ADC_TSC_0_REGS);

/* Configure step 1 for channel 1(AN0)*/
StepConfigure(0, TSCADC_FIFO_0, TSCADC_POSITIVE_INP_CHANNEL1);

/* Configure step 2 for channel 2(AN1)*/
StepConfigure(1, TSCADC_FIFO_1, TSCADC_POSITIVE_INP_CHANNEL2);
#ifdef ch3_&_ch4
/* Configure step 3 for channel 3(AN2)*/
StepConfigure(0, TSCADC_FIFO_0, TSCADC_POSITIVE_INP_CHANNEL3);

/* Configure step 4 for channel 4(AN3)*/
StepConfigure(1, TSCADC_FIFO_1, TSCADC_POSITIVE_INP_CHANNEL4);
#endif
#ifdef ch5_&_ch6
/* Configure step 5 for channel 5(AN4)*/
StepConfigure(0, TSCADC_FIFO_0, TSCADC_POSITIVE_INP_CHANNEL5);

/* Configure step 6 for channel 6(AN5)*/
StepConfigure(1, TSCADC_FIFO_1, TSCADC_POSITIVE_INP_CHANNEL6);
#endif
#ifdef ch7_&_ch8
/* Configure step 7 for channel 7(AN6)*/
StepConfigure(0, TSCADC_FIFO_0, TSCADC_POSITIVE_INP_CHANNEL7);
/* Configure step 8 for channel 8(AN7)*/
StepConfigure(1, TSCADC_FIFO_1, TSCADC_POSITIVE_INP_CHANNEL8);
#endif
/* General purpose inputs */
TSCADCTSModeConfig(SOC_ADC_TSC_0_REGS, TSCADC_GENERAL_PURPOSE_MODE);

/* Enable step 1 */
TSCADCConfigureStepEnable(SOC_ADC_TSC_0_REGS, 1, 1);

/* Enable step 2 */
TSCADCConfigureStepEnable(SOC_ADC_TSC_0_REGS, 2, 1);
#ifdef ch3_&_ch4
/* Enable step 3 */
TSCADCConfigureStepEnable(SOC_ADC_TSC_0_REGS, 3, 1);

/* Enable step 4 */
TSCADCConfigureStepEnable(SOC_ADC_TSC_0_REGS, 4, 1);
#endif
#ifdef ch5_&_ch6
/* Enable step 5 */
TSCADCConfigureStepEnable(SOC_ADC_TSC_0_REGS, 5, 1);

/* Enable step 6 */

TSCADCConfigureStepEnable(SOC_ADC_TSC_0_REGS, 6, 1);
#endif
#ifdef ch7_&_ch8
/* Enable step 7 */
TSCADCConfigureStepEnable(SOC_ADC_TSC_0_REGS, 7, 1);

/* Enable step 8 */
TSCADCConfigureStepEnable(SOC_ADC_TSC_0_REGS, 8, 1);
#endif
/* Clear the status of all interrupts */
CleanUpInterrupts();

/* End of sequence interrupt is enable */
TSCADCEventInterruptEnable(SOC_ADC_TSC_0_REGS, TSCADC_END_OF_SEQUENCE_INT);

/* Enable the TSC_ADC_SS module*/
TSCADCModuleStateSet(SOC_ADC_TSC_0_REGS, TSCADC_MODULE_ENABLE);
}
/* Reads the data from FIFO 0 and FIFO 1 */
static void ADCIsr()
{
volatile unsigned int status;

status = TSCADCIntStatus(SOC_ADC_TSC_0_REGS);

TSCADCIntStatusClear(SOC_ADC_TSC_0_REGS, status);

if(status & TSCADC_END_OF_SEQUENCE_INT)
{
/* Read data from fifo 0 */
sample1 = TSCADCFIFOADCDataRead(SOC_ADC_TSC_0_REGS, TSCADC_FIFO_0);

/* Read data from fif 1*/
sample2 = TSCADCFIFOADCDataRead(SOC_ADC_TSC_0_REGS, TSCADC_FIFO_1);
}
}
//=================================================================================================
Enable or disable TSCADCConfigureStepEnable() in your subroutine. Then you can get your ADC channel value.
A1. I am stupid. So that I use the switch channel enable for two FIFO interrupt.
A2. The ADC resolution is 12 bits , so that the step registers should be 16. I guess??

Henry Chou

Hey sram,

I have the same doubts. I would like to know if you already find out something to proceed and read the data from different ADC channels (AIN0-AIN6). Thanks for the attention.

Best regards,
Luciano.