TI Starterware boot loader from SD card takes long time

I could debug further and found that, the following functions don't work in boot loader SD card initialization.
MMUConfigAndEnable();
EDMAModuleClkConfig();

/* Configure EDMA to service the HSMMCSD events. */
HSMMCSDEdmaInit();

The ImageCopy doesn't work because of the the above functions? Can someone suggest me what is going wrong here?

I further analyzed the code and 2 functions are causing the issue.
MMUConfigAndEnable()
and EDMA3AINTCConfigure(void)

I saw similar issue about MMU configuration in this URL:
e2e.ti.com/.../740195

I further nailed down to root of the problem, the following 2 function if either or both are un commented in the code are not working. MMUConfigAndEnable() and IntMasterIRQEnable()
1. MMUConfigAndEnable()
{
/*
** Define DDR memory region of AM335x. DDR can be configured as Normal
** memory with R/W access in user/privileged modes. The cache attributes
** specified here are,
** Inner - Write through, No Write Allocate
** Outer - Write Back, Write Allocate
*/
REGION regionDdr = {
MMU_PGTYPE_SECTION, START_ADDR_DDR, NUM_SECTIONS_DDR,
MMU_MEMTYPE_NORMAL_NON_SHAREABLE(MMU_CACHE_WT_NOWA,
MMU_CACHE_WB_WA),
MMU_REGION_NON_SECURE, MMU_AP_PRV_RW_USR_RW,
(unsigned int*)pageTable
};
/*
** Define OCMC RAM region of AM335x. Same Attributes of DDR region given.
*/
REGION regionOcmc = {
MMU_PGTYPE_SECTION, START_ADDR_OCMC, NUM_SECTIONS_OCMC,
MMU_MEMTYPE_NORMAL_NON_SHAREABLE(MMU_CACHE_WT_NOWA,
MMU_CACHE_WB_WA),
MMU_REGION_NON_SECURE, MMU_AP_PRV_RW_USR_RW,
(unsigned int*)pageTable
};

/*
** Define Device Memory Region. The region between OCMC and DDR is
** configured as device memory, with R/W access in user/privileged modes.
** Also, the region is marked 'Execute Never'.
*/
REGION regionDev = {
MMU_PGTYPE_SECTION, START_ADDR_DEV, NUM_SECTIONS_DEV,
MMU_MEMTYPE_DEVICE_SHAREABLE,
MMU_REGION_NON_SECURE,
MMU_AP_PRV_RW_USR_RW | MMU_SECTION_EXEC_NEVER,
(unsigned int*)pageTable
};

/* Initialize the page table and MMU */
MMUInit((unsigned int*)pageTable);

/* Map the defined regions */
MMUMemRegionMap(&regionDdr);
MMUMemRegionMap(&regionOcmc);
MMUMemRegionMap(&regionDev);

/* Now Safe to enable MMU */
MMUEnable((unsigned int*)pageTable);


}
2. EDMA3AINTCConfigure(void) calls-> IntMasterIRQEnable() calls ->CPUirqe()
CPUirqe()
{
/* Enable IRQ in CPSR */
asm(" mrs r0, CPSR\n\t"
" bic r0, r0, #0x80\n\t"
" msr CPSR_c, r0");
}
Please let me know why these functions don't work in bootloader?

Finally if either Interrupts are enabled through CPSR and/or MMU is enabled in the MLO boot loader code the CPU hangs. I searched in the web and found that many people have reported the CPU freeze in u-boot when intterupts and enabled.

Seetaram,

Following are the reasons for difference in performance of MMCSD from in bootloader and application
1. In bootloader MMCSD is in polling mode and in application it uses DMA in interrupt mode
2. Cache and MMU are enabled in application but not in bootloder

To enable these features in bootloder following modifications are required.
1. Startup code and linker file to be modified to use interrupt.
2. system_config library has to be linked
3. Interrupt handling and EDMA configuration from application have to be ported to bootloder use case.

In bootloder file is read from Card in chunks into internal memory and copied to DDR. Instead it can be copied to DDR directly.

Regards,
Ramesh D

Hi Ramesh,

Thanks for the response.

I have analyzed these details and was trying to incorporate these changes in the boot loader code. I have ported the code from hs_mmcsd into boot loader. 2 things are not working. Interrupts and MMU.

What changes are required in startup code and linker command file to handle interrupts? 

Why cache and  MMU cannot be enabled in Boot loader? Any specific reason?

If i don't enable MMU, just with EDMA mode can i get the required SD card throughput (24Mbytes/sec)?

Infact i had tried to copy directly to DDR from SD card but it didn't really help a lot.

Regards,

Seetaram

Usually interrupt are avoided in bootloder. Using EDMA in polling mode is another option.

What changes are required in startup code and linker command file to handle interrupts?
The init code and startup code shall have vector table configuration for IRQ handled. For the difference compare the init.S of bootloder and application. With is include system_config library

Why cache and MMU cannot be enabled in Boot loader? Any specific reason?
Bootloder executes from internal memory. So Cache may not have significant impact on performance in this case. No definite reason why it should not be enabled.

If i don't enable MMU, just with EDMA mode can i get the required SD card throughput (24Mbytes/sec)?
Cache and MMU definitely have significant impact in case of application. Run the application without Cache and MMU enabled and compare with it. But do not know the impact of the same in bootloder with EDMA.

Infact i had tried to copy directly to DDR from SD card but it didn't really help a lot.
Ok

Regards,
Ramesh D

Hi Ramesh,

The system_config library linked with boot loader and the hs_mmcsd application are the same. The system_config contains startup.c file where the IVT is declared as follows .

const unsigned int AM335X_VECTOR_BASE = 0x4030FC00;
tatic unsigned int const vecTbl[14]=
{
0xE59FF018, /* Opcode for loading PC with the contents of [PC + 0x18] */
0xE59FF018, /* Opcode for loading PC with the contents of [PC + 0x18] */
0xE59FF018, /* Opcode for loading PC with the contents of [PC + 0x18] */
0xE59FF018, /* Opcode for loading PC with the contents of [PC + 0x18] */
0xE59FF014, /* Opcode for loading PC with the contents of [PC + 0x14] */
0xE24FF008, /* Opcode for loading PC with (PC - 8) (eq. to while(1)) */
0xE59FF010, /* Opcode for loading PC with the contents of [PC + 0x10] */
0xE59FF010, /* Opcode for loading PC with the contents of [PC + 0x10] */
(unsigned int)Entry,
(unsigned int)UndefInstHandler,
(unsigned int)SVC_Handler,
(unsigned int)AbortHandler,
(unsigned int)IRQHandler,
(unsigned int)FIQHandler
};

the init.S file is only present in the boot loader code but not in hs_mmcsd code.
As the same system_config library is linked with boot loader and also the application (hs_mmcsd), so there should not be any issue of interrupt handling in boot loader. Else the issue should be seen in both the places?

regards,
Seetaram

sram said:

Surprisingly it took just 10msec to copy a file size of around 100kB.

What frequency is the bus during transfers?  I assume the issue here is likely giant gaps between transfers, though it would be helpful as a starting point to understand what the frequency is during transfers and how large are the gaps you're seeing.

On a related note, what kind of performance do you see when the ROM code is loading your bootloader?

Hi Brad,

Thanks for the response, please refer to my following question where i captured all the details.

e2e.ti.com/.../415619

I don,t know how much time the ROM code takes to load my boot loader as TI doesn't share the ROM boot loader code nor do i have any mechanism to profile this and figure out?

My point is simple that, the Copy from SD card to DDR3 takes just 10 msec in app where as it takes 800 msec in MLO to copy same file of size 100kb. This difference is due to the way the SD card read to DDR3 works.

I have listed these differences in the following e2e post.

e2e.ti.com/.../415619

Please suggest

Regards,

Seetaram