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Possible bug in OMAP-L138 Starterware timer routines

Other Parts Discussed in Thread: OMAP-L138

I found a possible bug in the OMAP-L138 Starterware timer routines. Perhaps it's not a full-on bug, but it's unclean, and may need fixing. 

In the file \drivers\timer.c, in the routine, TimerConfigure(), there is the following line of code:

HWREG(baseAddr + TMR_TCR) = (config & (TMR_TCR_CLKSRC12 | TMR_TCR_CLKSRC34));

The item in red (along with config) can potentially set bit-24 of the Timer Control Register (TCR).  However, in the OMAP-L138, that bit is RESERVED, and should be zero, not set to one.  (Reference:  OMAP-L138 Tech Ref Manual)

I don't know if that actually causes a problem.  (Setting a reserved bit to one.) At the least, it's unclean. 

The clean solution is to: 

  • Delete | TMR_TCR_CLKSRC34 from that line of code for this processor. Or,
  • Use an #if <processor-type> in that file to insert the correct line of code, depending on processor-type.  Or,
  • Use an #if <processor-type>, (in the header file, hw_tmr.h) to #define it to zero for this processor. 

Can a TI person verify this for us?

-- Walter Snafu

 

  • Hi Walter Snafu,

    Let me look into it and get back as early as possible.

    Regards,

    Shankari

  • Hi Walter Snafu,

    yes, your observation is right.

    Using "TMR_TCR_CLKSRC34" , setting the 24th bit of TCR is not required. As per the TRM, that bit is a reserved one.

    You can delete the " | TMR_TCR_CLKSRC34"  from that line of code for this processor.

    Regards,

    Shankari

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