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AM335x DCAN Receive FIFO Setting.

I want to use DCAN message objects for FIFO.

Now, Starterware use 1-31 for send, 32-64 for receive.

In example, receive setting use only No.64 message object.

I wan to set ID 0x030000 Accectance Filter 0xFF0000 (ID range 0x030000 - 0x03FFFF), to No.32 - 64 Message Objects.

And, Is Eob setting need to No.32-63 '0', No.64 '1' ?

  • If you want to use FIFO configuration for the message objects .

    For example : If we use 1-31 for send, 32-64 for receive, then configure

    EOB setting for 1-30 is '0' and 31 as '1' ( Send)

    EOB setting for 32-63 is '0' and 64 as '1' (Receive)

    Can you please give more details on this below query ?

    "I wan to set ID 0x030000 Accectance Filter 0xFF0000 (ID range 0x030000 - 0x03FFFF), to No.32 - 64 Message Objects."

    As I understand , do you want to set ID range (0x030000 - 0x03FFFF) and Acceptance filter as 0xFF0000 for 32-64 Message objects ( Receive)?

    Can you please tell me the which starterware code base are you using ?

  • Now, I using AM335X_StarterWare_02_00_01_01.

    I change CANRxObjectConfig in dcan_frame.c
    I use MSG_OBJ 8-63 for receive. (ID 0x030000 and Accectance Filter 0xFF0000)

    (I want large FIFO. I change object distribution.)

    And set EOB OBJ_8~62 is 0, OBJ_63 is 1.
    In Examaple (dcanTxRx.c), OBJ_64 only used.


    /* Enable the FIFO end of block */

    DCANFIFOEndOfBlockControl(baseAdd, DCAN_END_OF_BLOCK_DISABLE, DCAN_IF2_REG);

    for (msgIndex = (CAN_NUM_OF_MSG_OBJS / 8); msgIndex < (CAN_NUM_OF_MSG_OBJS - 1); msgIndex++)
    {
      /* Check for the message valid status for receive objects */
      if (DCANMsgValidStatusGet(baseAdd, msgIndex) == 0)
      {
        /* Configure the command register */
        DCANCommandRegSet(baseAdd, (DCAN_ACCESS_CTL_BITS | DCAN_MSG_WRITE |
        DCAN_ACCESS_MSK_BITS | DCAN_ACCESS_ARB_BITS),
        msgIndex, DCAN_IF2_REG);
      }
    }

    DCANFIFOEndOfBlockControl(baseAdd, DCAN_END_OF_BLOCK_ENABLE, DCAN_IF2_REG);
    DCANCommandRegSet(baseAdd, (DCAN_ACCESS_CTL_BITS | DCAN_MSG_WRITE |  DCAN_ACCESS_MSK_BITS | DCAN_ACCESS_ARB_BITS),
    msgIndex, DCAN_IF2_REG);