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AM437x DCAN RAM init

S. Dodig
Prodigy 50 points
Other Parts Discussed in Thread: SYSBIOS

Hi,


I have a problem with the DCAN RAM initialization on the AM437x processor. I´ve modified the procedure (appropriate registers) that works fine on the AM355x processor. In the CRTL_DCAN_RAMINIT register DCAN0_RAMINIT_START bit is set, but DCAN RAM intitialization procedure does never finish (DCAN0_RAMINIT_DONE flag is never set).

HWREG(SOC_CM_PER_REG + PRCM_CM_PER_L3S_CLKSTCTRL) =
              PRCM_CM_PER_L3S_CLKSTCTRL_CLKTRCTRL_SW_WKUP;

     while((HWREG(SOC_CM_PER_REG + PRCM_CM_PER_L3S_CLKSTCTRL) &
             PRCM_CM_PER_L3S_CLKSTCTRL_CLKTRCTRL_MASK) != PRCM_CM_PER_L3S_CLKSTCTRL_CLKTRCTRL_SW_WKUP);

     HWREG(SOC_CM_PER_REG + PRCM_CM_PER_L3_CLKSTCTRL) =
             PRCM_CM_PER_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP;

     while((HWREG(SOC_CM_PER_REG + PRCM_CM_PER_L3_CLKSTCTRL) &
             PRCM_CM_PER_L3_CLKSTCTRL_CLKTRCTRL_MASK) != PRCM_CM_PER_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP);

     HWREG(SOC_CM_PER_REG + PRCM_CM_PER_L3_INSTR_CLKCTRL) =
             PRCM_CM_PER_L3_INSTR_CLKCTRL_MODULEMODE_ENABLE;


     while((HWREG(SOC_CM_PER_REG + PRCM_CM_PER_L3_INSTR_CLKCTRL) &
             PRCM_CM_PER_L3_INSTR_CLKCTRL_MODULEMODE_MASK) !=
                     PRCM_CM_PER_L3_INSTR_CLKCTRL_MODULEMODE_ENABLE);

     HWREG(SOC_CM_PER_REG + PRCM_CM_PER_L3_CLKCTRL) =
             PRCM_CM_PER_L3_CLKCTRL_MODULEMODE_ENABLE;

     while((HWREG(SOC_CM_PER_REG + PRCM_CM_PER_L3_CLKCTRL) &
             PRCM_CM_PER_L3_CLKCTRL_MODULEMODE_MASK) != PRCM_CM_PER_L3_CLKCTRL_MODULEMODE_ENABLE);

     HWREG(SOC_CM_PER_REG + PRCM_CM_PER_OCPWP_L3_CLKSTCTRL) =
             PRCM_CM_PER_OCPWP_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP;

     while((HWREG(SOC_CM_PER_REG + PRCM_CM_PER_OCPWP_L3_CLKSTCTRL) &
             PRCM_CM_PER_OCPWP_L3_CLKSTCTRL_CLKTRCTRL_MASK) !=
                     PRCM_CM_PER_OCPWP_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP);

     HWREG(SOC_CM_PER_REG + PRCM_CM_PER_L4LS_CLKSTCTRL) =
             PRCM_CM_PER_L4LS_CLKSTCTRL_CLKTRCTRL_SW_WKUP;

     while((HWREG(SOC_CM_PER_REG + PRCM_CM_PER_L4LS_CLKSTCTRL) &
             PRCM_CM_PER_L4LS_CLKSTCTRL_CLKTRCTRL_MASK) !=
                                      PRCM_CM_PER_L4LS_CLKSTCTRL_CLKTRCTRL_SW_WKUP);
                                      
    HWREG(SOC_CM_PER_REG + PRCM_CM_PER_L4LS_CLKCTRL) =
            PRCM_CM_PER_L4LS_CLKCTRL_MODULEMODE_ENABLE;

    while((HWREG(SOC_CM_PER_REG + PRCM_CM_PER_L4LS_CLKCTRL) &
             PRCM_CM_PER_L4LS_CLKCTRL_MODULEMODE_MASK) != PRCM_CM_PER_L4LS_CLKCTRL_MODULEMODE_ENABLE);
            
    HWREG(SOC_CM_PER_REG + PRCM_CM_PER_DCAN0_CLKCTRL) =
        PRCM_CM_PER_DCAN0_CLKCTRL_MODULEMODE_ENABLE;

    while((HWREG(SOC_CM_PER_REG + PRCM_CM_PER_DCAN0_CLKCTRL) &
        PRCM_CM_PER_DCAN0_CLKCTRL_MODULEMODE_MASK) !=
                 PRCM_CM_PER_DCAN0_CLKCTRL_MODULEMODE_ENABLE);
                
    while(!(HWREG(SOC_CM_PER_REG + PRCM_CM_PER_L3S_CLKSTCTRL) &
             PRCM_CM_PER_L3S_CLKSTCTRL_CLKACTIVITY_GCLK_MASK));

     while(!(HWREG(SOC_CM_PER_REG + PRCM_CM_PER_L3_CLKSTCTRL) &
             PRCM_CM_PER_L3_CLKSTCTRL_CLKACTIVITY_GCLK_MASK));

     while(!(HWREG(SOC_CM_PER_REG + PRCM_CM_PER_OCPWP_L3_CLKSTCTRL) &
            PRCM_CM_PER_OCPWP_L3_CLKSTCTRL_CLKACTIVITY_GCLK_MASK ));

     while(!(HWREG(SOC_CM_PER_REG + PRCM_CM_PER_L4LS_CLKSTCTRL) &
            (PRCM_CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_GCLK_MASK |
                    PRCM_CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_CAN_CLK_MASK)));

    // Start DCAN0 RAM initialization
    HWREG(SOC_CONTROL_MODULE_REG + CTRL_DCAN_RAMINIT) |= CTRL_DCAN_RAMINIT_DCAN0_START_MASK;
    
    // Wait until initialization is finished
    while(!(HWREG(SOC_CONTROL_MODULE_REG + CTRL_DCAN_RAMINIT) & CTRL_DCAN_RAMINIT_DCAN0_DONE_MASK));

Do I have to set any other parameters?

Best Regards,

Slaven Dodig