Hi gurus!
Help me please to solve a problem. I use UART FIFO DMA MODE and ECAP module.
Programmable threshold in UART RX FIFO =50 byte
When the number of bytes in the FIFO reaches 50, UART FIFO generates a request to the DMA.
DMA copies the first 4 bytes of the Time-Stamp Counter Register ECAP module to external RAM and generates an event in the DMA channel UART.
And DMA copies 50 bytes of FIFO in the external RAM.
More UART TX FIFO working through DMA.
Reception and transmission of UART occur asynchronously.
Everything works fine, but ....
From time to time have a situation when the DMA does not copy from UART FIFO to RAM and not copy from TSCTR register of ECAP to RAM.
This only occurs when an asynchronous transmission and reception of UART through DMA.
Help solve the problem..
