AM335x ICE V2 ISDK Eval Card J3 SPI Master Lines (CS,CLK,MOSI,MISO) connected to a MAXIM 78615+PPM Eval Card SPI Slave

Also after initialized, in order to get data from the SPI slave I need to keep the CS asserted throughout the write/read sequence. Is this the function call sequence for that? What doew spiCs have to be set to in the write and read functions?

McSPICSAssert(McSPIGetBaseAddress(spiId), chNum);
McSPIWrite(spiId,writeBuf,sizeof(writeBuf),spiCs);
McSPIRead(spiId,&readBuf,sizeof(readBuf),spiCs);
McSPICSDeAssert(McSPIGetBaseAddress(spiId), chNum);

Moving this to the Starterware forum.

Haven't heard from anyone monitoring the Starterware forum, but in the mean time I tried following the instructions in the Starterware UserGuide_02_00_01_01.pdf. While doing this i had to make the following changes to the platform/mcspi.c file as follows:

1. Instead of calling platform/mcspi.c int McSPIPinMuxSetup(unsigned int instanceNum), within my own code I did this as I couldn't build the platform library after making the change to it:

HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_SCLK) =
(CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_PUTYPESEL |
CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_RXACTIVE);
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_D0) =
(CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_PUTYPESEL |
CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_RXACTIVE);
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_D1) =
(CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_PUTYPESEL |
CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_RXACTIVE);

2. Instead of calling platform/mcspi.c int McSPI0CSPinMuxSetup(unsigned int csPinNum), within my own code I did this as I couldn't build the platform library after making the change to it:

HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_CS0) =
(CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_PUTYPESEL |
CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_RXACTIVE);

Here's the entire initialization sequence i implemented:

#define SPI_IN_CLK 48
#define SPI_OUT_CLK 1
#define _8BIT_SPI_WORD_LENGTH 8

unsigned int spiInClk=SPI_IN_CLK;
unsigned int spiOutClk=SPI_OUT_CLK;
unsigned int clkMode=MCSPI_CLK_MODE_0;
unsigned int channelMode=MCSPI_MODULCTRL_SINGLE_SINGLE;
unsigned int trMode=MCSPI_TX_RX_MODE;
unsigned int pinMode=MCSPI_DATA_LINE_COMM_MODE_0;
unsigned int spiEnPol=MCSPI_CS_POL_LOW;
unsigned int csPinNum=MCSPI_CHANNEL_0;
int ret=0;

McSPI0ModuleClkConfig();

#ifdef 0
ret = McSPIPinMuxSetup(spiId);
if( ret != S_PASS )
return ret;
ret = McSPI0CSPinMuxSetup(csPinNum);
#else
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_SCLK) =
(CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_PUTYPESEL |
CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_RXACTIVE);
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_D0) =
(CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_PUTYPESEL |
CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_RXACTIVE);
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_D1) =
(CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_PUTYPESEL |
CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_RXACTIVE);

HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_CS0) =
(CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_PUTYPESEL |
CONTROL_CONF_SPI0_SCLK_CONF_SPI0_SCLK_RXACTIVE);
ret = 0;

#endif
McSPIReset(McSPIGetBaseAddress(spiId));
McSPICSEnable(McSPIGetBaseAddress(spiId));
McSPIMasterModeEnable(McSPIGetBaseAddress(spiId));
ret = McSPIMasterModeConfig(McSPIGetBaseAddress(spiId),channelMode,trMode,pinMode,chNum);
if(ret != TRUE )
return ret;
McSPIClkConfig(McSPIGetBaseAddress(spiId),spiInClk,spiOutClk,chNum,clkMode);
McSPIWordLengthSet(McSPIGetBaseAddress(spiId),MCSPI_WORD_LENGTH(_8BIT_SPI_WORD_LENGTH),chNum);
McSPICSPolarityConfig(McSPIGetBaseAddress(spiId),spiEnPol,chNum);
McSPITxFIFOConfig(McSPIGetBaseAddress(spiId),MCSPI_TX_FIFO_ENABLE,chNum);
McSPIRxFIFOConfig(McSPIGetBaseAddress(spiId),MCSPI_RX_FIFO_ENABLE,chNum);
McSPIChannelEnable(McSPIGetBaseAddress(spiId),chNum);

And here's the write sequence:

McSPITransmitData(McSPIGetBaseAddress(spiId),txData,chNum);

At any rate I have a logic analyzer instrumented and I do NOT see any activity on the SPI 1 CS, Clock, or MOSI signals coming off the J3 connector as documented in the schematic.

Hopefully someone can verify my hardware configuration and code and point me in the right direction.

Thanks,

Ted

I have reviewed the starterware 02 00 01 01 User Guide regarding McSPI programming sequence. I noticed SPI0 is referenced and not SPI1. On our AM3359 Industrial Communications Engine Board I believe the SPI Flash is interfaced to the SPI0 controller. The 4 SPI1 interface pins are brought on the J3 Connector. We have a SPI slave device on a vendors eval board interfaced to these PINS. Anyway I tried to follow the instructions using SPI1 instead of SPI0. However I noticed there are some register offset definitions missing for SPI1. See my excerpt below:

CONTROL_CONF_SPI0_SCLK
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI1_SCLK) =
(CONTROL_CONF_SPI0_SCLK_CONF_SPI1_SCLK_PUTYPESEL |
CONTROL_CONF_SPI0_SCLK_CONF_SPI1_SCLK_RXACTIVE);
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI1_D0) =
(CONTROL_CONF_SPI1_SCLK_CONF_SPI1_SCLK_PUTYPESEL |
CONTROL_CONF_SPI1_SCLK_CONF_SPI1_SCLK_RXACTIVE);
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI1_D1) =
(CONTROL_CONF_SPI1_SCLK_CONF_SPI1_SCLK_PUTYPESEL |
CONTROL_CONF_SPI1_SCLK_CONF_SPI1_SCLK_RXACTIVE);

HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI1_CS0) =
(CONTROL_CONF_SPI1_SCLK_CONF_SPI1_SCLK_PUTYPESEL |
CONTROL_CONF_SPI1_SCLK_CONF_SPI1_SCLK_RXACTIVE);

I am worried that we cannot use the SPI1 interface lines brought out on the J3 connector because the board does not support them. If this is the case I need to know this ASAP.

We are evaluating the usage of the AM3356 SoC for our real product in many ways similar to this AM3359 board. For example using SPI0 to connect to a SPI flash device and SPI1 to connect to an energy measurement device. I am not only concerned that we can not do this on this evaluation board, but we will not be able to do this w/our proposed AM3356 board that is being designed now.

Please respond to this ASAP. We would like to use this TI part but If we dont get an answer we will have to look elsewhere.