DHCP Client not working on CPSW NDK build

John,

AM335x has 3 MAC address reserved for every chip. It's upto the application/driver to use them as required. These MAC addresses are not tied to Port0/1/2. As you mentioned, the first MAC address is stored in 0x44E10630 & 34 and the ISDK os_driver reserves MAC ID0 for CPSW and MAC ID1 for ICSS. 

Please note that MAC_ID0 and MAC_ID1(in TRM) are the lower and upper ranges of MAC addresses reserved to AM335x

Regards,
Vinesh

Hi Vinish,

     On our board the Ethernet Phy is connected to RGMII2 for data tx/rx and MDIO address 1 for chip configuration. When I was looking at the MAC configuration of "config.phyAddr[x]" I thought that this was referring to the RGMII port number of one or two. Now that I understand that the phy_addr is referring to the MDIO address, my question is how do I set the NDK data tx/rx to the Phy to use RGMII2? Their are only two calls in the ethernetip_example code for setting this up. One is SetMacConfiguration() and the other is AddNetifEntryFn(). 

SetMacConfiguration - Sets the MDIO address and Phy configuration information.

AddNetifEntryFn - Sets NIMUDeviceTable[] with the CpswEmacInit function pointer.

     In the CpswEmacInit function, the device drivers start function is set to CpswEmacStart(). When this function is called it will call CpswHwPktOpen which calls Setup_CpswInitConfig(). In the Setup_CpswInitConfig function there are two lines of code that set the port base addresses:

    iCfg->baseConfig.port[PORT_1].port_base = CPSW0_PORT_1_REGS;
    iCfg->baseConfig.port[PORT_2].port_base = CPSW0_PORT_2_REGS;

     So at this point I don't see how I could assign the data pathway of a single Ethernet CPSW port to be Port 2 (RGMII2) of the AM335x. Is the CPSW ehternet driver always going to set the first port to Port 1, or is there something in the configuration that I am missing? The other question I have is do I need to enable the EMAC in the Data Link layer ? It seems that based on code inspection I should, but the ethernetip_example does not enable it.

Thanks,

     John C.

John,

I do not completely understand your question. What do you exactly mean by RGMII2? And what do you mean by "set the NDK data tx/rx to the Phy to use RGMII2"?

Regards,
Vinesh

Hi Vinesh,

     The AM335x processors have a built in Ethernet switch that had one of three interface types for the Ethernet data transmission or reception(see the pic below): GMII1&2, RGMII1&2 and RMII1&2. The selection of which interface depends on the hardware design to the Ethernet phy chip and the Pin Mux configuration of the processor. For our design we use the RGMII2 port to connect the processor to the data transmit/receive pins of the Ethernet phy chip. 

      The port numbers are a direct reference to the CPSW "Ethernet Switch Port Control" registers for the processor. The addresses of the registers are used in the soc_AM335x.h for the definition of SOC_CPSW_PORT_x_REGS. These definitions are used in cpsw_ethdriver.c. So when I say RGMII2, I am referring to the NDK's use of CPSW port 2, which is the Ethernet data path to/from the processor.

     John C.

Vinesh,

     I have been trying to rebuild the sys_bios_driver library after modifying the cpsw_ethdriver.c file.I imported the project but have been unable to get it to build. It comes up with a generic error, but nothing specific that I can look at. Am I supposed to be able to build this library or is it something only TI can do?

Thanks,

     John C.

**** Build of configuration Release for project sys_bios_driver ****
"C:\\ti\\ccsv5_5\\ccsv5\\utils\\bin\\gmake" -k all
gmake: Target `all' not remade because of errors.
**** Build Finished ****

John,

The NDK driver provided with Industrial SDK let's you configure the number of ports and the phy number. As you can see in the example, it supports a 2 port configuration(ICEv2) and a 1 port configuration(IDK). But as you have observed, I do not think there is a specific provision to select the instance of MII ports. For now, you will have to tweak the driver(search for places where  config.numberPorts    = 2 is used, this controls the loops)

To rebuild the os_drivers, you probably missed step 9 here - http://processors.wiki.ti.com/index.php/AM335x_SYSBIOS_Industrial_SDK_Getting_Started_Guide#Importing_and_Building_Sample_Project_in_CCS

Regards,
Vinesh

Hey Vinesh,

     I took your suggestion about step 9 and was able to get the OS drivers to build. 
I walked through a lot of code, but am still getting several errors on the 
DHCP client. The three issues are:

1) DHCP Status keeps going to Disabled.
2) Illegal priority call to llEnter().
3) NDK Stack Thread keeps getting terminated.

     So my approach of trying to understand the os_drivers more has failed. Can I get 
some opinions as to what my current problem my be? Can I also ask again if there is 
internal code that has used CPSW to see if I have left some configurations out?

Thanks,
     John C.

#'s 1 & 2

[CortxA8]

Service Status: DHCPC    : Enabled  :          : 000
Service Status: DHCPC    : Disabled :          : 000
00000.000 Illegal priority call to llEnter()
00000.000 Illegal call to llExit()

#3 NDK is terminated

John Conover said:

2) Illegal priority call to llEnter().
3) NDK Stack Thread keeps getting terminated.

This happens when some user defined task has a higher priority the NDK task. I see you have multiple tasks with priority greater than NDK task. Try bringing their priority down(ethernet_task and MAIN_get_fifo_data_task)

Regards,
Vinesh

Hi Vinesh,

     What are the priorities supposed to be? The NDK Scheduling Options show four different Task Priority Levels for the Tasks that the NDK creates but not of itself.

Thanks,

     John C.

Hi Vinesh,

     I found a setting in the advanced NDK Core Stack ndkThreadPri and set it to 11 which is very high priopoty in our system. After a bit of running the NDK priority went from 11 down to 8. Then I still got the same "Illegal priority" error and the NDK task terminated. Is there a document explaining what the NDK task is doing?

Thanks,

     John C.

Running at priority 11:

At some point it drops to priority 8:

Then it terminates:

John,

NDK is using task priorities to protect critical sections. As such any other task that is outside of the defined NDK task levels will break that approach. You may read up on this in the NDK user guide I think. Generally you should keep you application task priority below the NDK kernel priority. You may also increase the kernel prio in the config if you need a wider range.

However I assume you should not try to change anything inside NDK without a deep understanding of the NDK core code.

Regards,

Hey Frank,

     Because sys/bios does not have the ability to swap tasks of the same priority, our tasks that are responsible for data movement after a DMA are very high. I've adjusted the task that is starting the DCHP client to be between the low and high priority settings in the NDK configuration. I not longer see the priority errors, but their are no DHCP requests going out from our unit.

     So I understand the relationship of tasks that call the NDK, but what about other tasks in relation to the kernel level priority?

     Any other suggestions for troubleshooting the DHCP client?

Thanks,

     John C.

[CortxA8]

Service Status: DHCPC    : Enabled  :          : 000
Service Status: DHCPC    : Disabled :          : 000
Service Status: DHCPC    : Enabled  :          : 000
Service Status: DHCPC    : Enabled  : Running  : 000

Frank,

     After looking at some of the basics, I can see we are not receiving any Ethernet receive interrupts. The interrupt numbers are correct, both are enabled, but the priorities are different and the argument is zero versus one. Is their any internal TI example code that could clarify where the disconnect is?

Thanks,

     John C.

SYS/BIOS running NDK:

SYS/BIOS running lwip:

     Looks like the system is trying to send a 590 byte packet.The transmit and receive channels are a 0(CPSW3G_DEFAULT_TX_CHANNEL), so I'm not sure how this correlates to the AM335x ports?

     John C.

John,

You can verify this with the standard ethernetip_adapter example provided in the SDK(without any custom modifications). 

Regards,
Vinesh

Hey Vinesh,

     I can't actually debug with the ethernetip_adapter example as it is not compatible with our board and we don't have any development boards.

Thanks,

     John C.

John,

I assume in this case you really need to do some deep dive debugging into your system. You would need to check that all your ISRs are setup and enabled. I would start with sending test packets from the low level driver and trace them on the wire. Next step would be to send a defined packet to the board and follow the RX path from the low level driver up into the NDK. If that works you can start debugging the DHCP server. I assume the NDK DHCP server is working but obviously it requires a working TX/RX HW. Alternatively you could try first with a fixed IP configuration.

Regards,

Hi Frank,

    Right now I'm trying to track how the Ethernet DMA channel setup relates to the CPSW port numbers. If the NDK is trying to send something out but it is not making it out, then there is a disconnect between the DMA data pathway and the AM335x CPSW port data path.

Thanks,

     John C.

Hi John,

I think I need to pass on that one as I am not a CPSW expert. But if the CPSW is configured as a switch I would assume it uses internal routing to select a port for TX. If there is no routing table it would need to send to both ports (e.g. MC or BC packets...) I also assume there should be a way to define a fixed port for send but again I haven't worked a lot with CPSW so far. If you have dedicated questions please start a new forum entry so that we can send to our experts accordingly. Usually we assume that SW issues are reproducible on our hardware so we can debug.

regards,

Thanks Frank,

     I'll continue to look at the setup/configuration of the CPSW and start a new thread if I need help. If there are any internal TI code examples (as was mentioned in another thread last summer) it might help me with these configuration questions of the processor.

John C.