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MessageQ - A_idTooLarge: id cannot be larger than numEntries

I'm currently working with TMS320C6678 simulator in CCS 5.5. I would like to provide communication between CORE0-3 using MessageQ (for transport data) and Notify (for synchronization). In my case Ipc.procSync is set to Ipc.ProcSync_PAIR. CORE0 is master and other cores works as slaves. Off course I call Ipc_attach in CORE0-3.  Each core create their own queue. CORE0 open message queue from cores 1-3 and CORE0 open queue form cores 1-3. Here is code from CORE0 task:

Ipc_attach_with_core(1);
    Ipc_attach_with_core(2);
    Ipc_attach_with_core(3);

    Notify_registerEvent(1, INTERRUPT_LINE, EVENTID, (Notify_FnNotifyCbck)cbFxn, NULL); //notify events for simple synchronization
    Notify_registerEvent(2, INTERRUPT_LINE, EVENTID, (Notify_FnNotifyCbck)cbFxn, NULL);
    Notify_registerEvent(3, INTERRUPT_LINE, EVENTID, (Notify_FnNotifyCbck)cbFxn, NULL);

    HeapBufMP_Params_init(&heapBufParams); //creation heap
    heapBufParams.regionId       = 0;
    heapBufParams.name           = HEAP_NAME;
    heapBufParams.numBlocks      = 20;
    heapBufParams.blockSize      = sizeof(A_ES_i_B_ES);
    heapHandle = HeapBufMP_create(&heapBufParams);
    if (heapHandle == NULL) {
    	System_abort("HeapBufMP_create failed\n" );
    }
    
    /* Register this heap with MessageQ */
    MessageQ_registerHeap((IHeap_Handle)heapHandle, HEAPID);

    /* Create the local message queue */
    Id_MASTER_queue = MessageQ_create("MASTER_CORE0", NULL);
    
    open_queue("SLAVE_CORE1", &Id_CORE1_queue);
    open_queue("SLAVE_CORE2", &Id_CORE2_queue);
    open_queue("SLAVE_CORE3", &Id_CORE3_queue);
    
    A_ES_i_B_ES_wsk = (A_ES_i_B_ES **) calloc(1, sizeof(A_ES_i_B_ES *));
    Vs_wsk = (pot_wezlow_ukladu **) calloc(1, sizeof(pot_wezlow_ukladu *));

    Vs_wsk[0] =  (pot_wezlow_ukladu *) MessageQ_alloc(HEAPID, sizeof(pot_wezlow_ukladu));


	pointer_Vs = Vs_wsk[0];
	pointer_A_ES_i_B_ES = A_ES_i_B_ES_wsk[0];
    while (TRUE)
    {
    	System_printf("Start iteration - CORE0 \n");

		Notify_sendEvent(1, INTERRUPT_LINE, EVENTID, 0, TRUE); //start signal to other cores
		Notify_sendEvent(2, INTERRUPT_LINE, EVENTID, 0, TRUE);
		Notify_sendEvent(3, INTERRUPT_LINE, EVENTID, 0, TRUE);

		MessageQ_get(Id_MASTER_queue, (MessageQ_Msg *)&pointer_A_ES_i_B_ES, MessageQ_FOREVER);
                ...
		MessageQ_get(Id_MASTER_queue, (MessageQ_Msg *)&pointer_A_ES_i_B_ES, MessageQ_FOREVER);
                ...
		MessageQ_get(Id_MASTER_queue, (MessageQ_Msg *)&pointer_A_ES_i_B_ES, MessageQ_FOREVER);
                ...

		pointer_Vs->Vs[0] = 7.55;
		pointer_Vs->Vs[1] = 3.78;
		pointer_Vs->Vs[2] = -0.12;

		MessageQ_put(Id_CORE1_queue, (MessageQ_Msg)wskaznik_Vs);
		MessageQ_put(Id_CORE2_queue, (MessageQ_Msg)wskaznik_Vs);
		MessageQ_put(Id_CORE3_queue, (MessageQ_Msg)wskaznik_Vs);

		System_printf("Iteration done - CORE0 \n"); }

My structures definitions:

typedef struct A_ES_i_B_ES {
	MessageQ_MsgHeader header;
	float B_ES[6];
	float A_ES[6][6];
} A_ES_i_B_ES;

typedef struct pot_wezlow_ukladu {
	MessageQ_MsgHeader header;
	float Vs[3];
} pot_wezlow_ukladu;

Buffers (global) definitions and pointers (local):

pot_wezlow_ukladu * wskaznik_Vs;
	A_ES_i_B_ES * wskaznik_A_ES_i_B_ES;
static A_ES_i_B_ES ** A_ES_i_B_ES_wsk = 0;
static pot_wezlow_ukladu ** Vs_wsk = 0;

At the moment code in other cores is similar (CORES1-3):

    while (Ipc_attach(0) < 0) {
       Task_sleep(1);
    }

    Notify_registerEvent(0, INTERRUPT_LINE, EVENTID, (Notify_FnNotifyCbck)cbFxn, NULL);

    do { //open heap
		status = HeapBufMP_open(HEAP_NAME, &heapHandle);
		if (status < 0) {
			Task_sleep(1);
		}
    } while (status < 0);
    

    /* Register this heap with MessageQ */
    MessageQ_registerHeap((IHeap_Handle)heapHandle, HEAPID);

    /* Create the local message queue */
    Id_SLAVE_queue = MessageQ_create("SLAVE_COREN", NULL); //N is core Id
    
    open_queue("MASTER_CORE0", &Id_MASTER_queue);
    
    A_ES_i_B_ES_wsk = (A_ES_i_B_ES **) calloc(1, sizeof(A_ES_i_B_ES *));
    A_ES_i_B_ES_wsk[0] =  (A_ES_i_B_ES *) MessageQ_alloc(HEAPID, sizeof(A_ES_i_B_ES));

    Vs_wsk = (pot_wezlow_ukladu **) calloc(1, sizeof(pot_wezlow_ukladu *));


    pointer_Vs = Vs_wsk[0];
	pointer_A_ES_i_B_ES = A_ES_i_B_ES_wsk[0];
    while (TRUE)
    {
    	while(start_calculations == FALSE); //it's set in Notify callback - wait for start signal from MASTER
    	start_calculations = FALSE;

    	System_printf("Start iteration - CORE N \n"); //N is core Id

    	pointer_A_ES_i_B_ES->A_ES[0][0] = 9.98;
    	pointer_A_ES_i_B_ES->B_ES[0] = -1.23;


        MessageQ_put(Id_MASTER_queue, (MessageQ_Msg)pointer_A_ES_i_B_ES);


        MessageQ_get(Id_SLAVE_queue, (MessageQ_Msg *)&pointer_Vs, MessageQ_FOREVER);

		System_printf("Iteration done - CORE N \n"); //N is core Id
    }

My functions definitions:

Void open_queue(String name, MessageQ_QueueId *queue_Id)
{
	int status;

    do {
        status = MessageQ_open(name, queue_Id);
        if (status < 0) {
            Task_sleep(1);
        }
    } while (status < 0);
}

Void Ipc_attach_with_core(UInt16 number_of_core)
{
	while (Ipc_attach(number_of_core) < 0)
	{
	   Task_sleep(1);
	}
}

My cfg file is the same for all cores:

var nameList = MultiProc.getDeviceProcNames();

MultiProc.setConfig(null, nameList);
                           
var System   = xdc.useModule('xdc.runtime.System');
System.extendedFormats = '%$L%$S%$F%f';
var SysStd   = xdc.useModule('xdc.runtime.SysStd');
System.SupportProxy = SysStd;

/* Modules explicitly used in the application */
var Notify      = xdc.useModule('ti.sdo.ipc.Notify');
var MessageQ    = xdc.useModule('ti.sdo.ipc.MessageQ');
var Ipc         = xdc.useModule('ti.sdo.ipc.Ipc');
var HeapBufMP   = xdc.useModule('ti.sdo.ipc.heaps.HeapBufMP');
var MultiProc   = xdc.useModule('ti.sdo.utils.MultiProc');

/* BIOS/XDC modules */
var BIOS        = xdc.useModule('ti.sysbios.BIOS');
BIOS.heapSize   = 0x8000;
var Task        = xdc.useModule('ti.sysbios.knl.Task');

var tsk0 = Task.create('&tsk0_func');
tsk0.instance.name = "tsk0";

/* Synchronize all processors (this will be done in Ipc_start) */
Ipc.procSync = Ipc.ProcSync_PAIR;

/* Shared Memory base address and length */
var SHAREDMEM           = 0x0C000000;
var SHAREDMEMSIZE       = 0x00200000;

var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');
SharedRegion.setEntryMeta(0,
    { base: SHAREDMEM,
      len:  SHAREDMEMSIZE,
      ownerProcId: 0,
      isValid: true,
      name: "DDR2 RAM",
    });

My problem is with exception in CORE2. After this line I get exception:

...
MessageQ_get(Id_SLAVE_queue, (MessageQ_Msg *)&pointer_Vs, MessageQ_FOREVER); //exception
...

Exception:

[TMS320C66x_2] ti.sdo.ipc.SharedRegion: line 380: assertion failure: A_idTooLarge: id cannot be larger than numEntries
xdc.runtime.Error.raise: terminating execution

I tried increase SharedRegion.numEntries to 8 in cfg file but it still doesn't work. How can I solve it ?

My configuration is as follow:

IPC: 1.24.3.32

BIOS: 6.33.6.50

MATHLIB C66x: 3.1.0.0

  • Hi,

    You can find the IPC based demo code at: C:\ti\mcsdk_2_01_02_06\demos\image_processing\ipc\evmc6678l

    This code will transfer the data from Core0 to Core1-7. It will be easy understand about the IPC, how it is used.

    To get some more details, refer the below wiki pages.

    http://processors.wiki.ti.com/index.php/MCSDK_Image_Processing_Demonstration_Guide

  • Hi,

    Check the links provided by pubesh.

    But I have a few questions. What version of SYS/BIOS and IPC are you using? Where the function open_queue comes from? It's an wrapper for MessageQ_open()?

    Also check you ID value. If I'm not confused, queues ID belonging to core 0 should go from 0 to 65535, of Core 1 from 65536 to 131071 and so on, just add 2^16 for each core.

    BR

    J

  • Hi,

    My function open_queue is only local function as You said it's wrapper for MessageQ_open. I use it only for achieve more clarify code. I checked queues  ID for each core.

    -queue ID for CORE0 (checked in CORE1-3) is 0

    -queue ID for CORE1 (checked in CORE0) is 65536

    -queue ID for CORE2 (checked in CORE0) is 131072

    -queue ID for CORE3 (checked in CORE0) is 196608

    Also I will try again check links provided by Pubesh because my code is based on MCSDK image processing demo. My IPC version is 1.24.3.32 and BIOS is 6.33.6.50.

  • Hi,

    Sorry, I've made a mess and was looking in the wrong direction.

    If you check the error message and look in SharedRegion.c in line 380 you get:

    /*
     *  ======== SharedRegion_isCacheEnabled ========
     */
    Bool SharedRegion_isCacheEnabled(UInt16 id)
    {
        Bool cacheEnable = FALSE;
        
        /*
         *  if translate == TRUE or translate == FALSE
         *  and 'id' is not INVALIDREGIONID, then Assert id is valid.
         *  Return the heap associated with the region id.
         *
         *  If those conditions are not met, the id is from
         *  an address in local memory so return NULL.
         */
        if ((ti_sdo_ipc_SharedRegion_translate) ||
            ((ti_sdo_ipc_SharedRegion_translate == FALSE) &&
            (id != SharedRegion_INVALIDREGIONID))) {
            /* Need to make sure id is smaller than numEntries */
            Assert_isTrue((id < ti_sdo_ipc_SharedRegion_numEntries),
                ti_sdo_ipc_SharedRegion_A_idTooLarge); // The error comes from here
        
            cacheEnable = SharedRegion_module->regions[id].entry.cacheEnable;
        }
        
        return (cacheEnable);
    }

    This function is called internally by some other function, but I don't know which one. Maybe you can check in ROV the 'translate' property of sharedRegion and try to figure out what's going on.

    J

  • Maciej,

    Did you check the sample code and also   suggestions? Do you need further follow-up on this?

    If not, please help to close this thread. 

  • Hi Pubesh,


    Thank you for your response. I checked examples, but I still can't solve my problem. I think it's something wrong with my code or I should use newer version of IPC and BIOS. Actually I'm trying do something with variables (matrix, tables) in shared memory and Notify for synchronization. I have to implement parallel computing for scientific purposes in electrical engineering (real time modeling).

    Maciej

  • Maciej,

    Find the test code for MessageQ and Notify at: C:\ti\ipc_1_24_03_32\packages\ti\sdo\ipc\examples\multicore\evm667x