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Instruction fetch exception in Icp_start()

Li Zhang2
Prodigy 120 points
Other Parts Discussed in Thread: SYSBIOS

Hi,

I'm running some tests with IPC on the evm6678le (with xds560v2). I managed to run the 'notify' example with the 6678evm platform package comes with xdctools successfully.

Then I have made some adjustments to the platform by setting L2 cache to use whole 512kb L2SRAM on each core, then code/stack/heap are moved to DDR3. The GEL file comes with the EVM CD-ROM is used to initialize external memory.  (SharedRegion still in MSMCSRAM).

When every core called Icp_start(), CORE0 will throw a Instruction fetch exception at 8020b1b8

8020b1b4: 209006A2 || [ B0] MV.S2 B4,B1
$C$DW$L$ti_sdo_ipc_SharedRegion_start__F$32$E, $C$DW$L$ti_sdo_ipc_SharedRegion_start__F$33$B, $C$L1583:
--> 8020b1b8: 034D5C28 MVK.S1 0xffff9ab8,A6
8020b1bc: E2020300 .fphead n, l, W, HU, nobr, nosat, 0010000b
8020b1c0: 02909DC0 SUBAW.D1 A4,0x4,A5
8020b1c4: 03401168 MVKH.S1 0x80220000,A6
8020b1c8: 02141F7B AND.L2X B0,A5,B4
8020b1cc: E8EF || [!B0] MVK.S2 1,B1
8020b1ce: 035C || LDHU.D1T1 *A6[0],A5
8020b1d0: 20900FDA [ B0] MV.L2 B4,B1


I have no idea why a MVK instruction cause the PC register set to 0x00000000 and the exception is thrown. After reading some similar cases in the forum, I tried to increase the stack size but it doesn't seem to help.

The values of the registers are as follow

A0=0x0 A1=0x0
A2=0x0 A3=0x0
A4=0x0 A5=0x1
A6=0x19d A7=0x0
A8=0x80001c80 A9=0x1
A10=0xfffffffc A11=0x7
A12=0x80000060 A13=0x8022f258
A14=0x7 A15=0x4
A16=0xc020480 A17=0x180
A18=0xc0204b4 A19=0x10
A20=0x78afefdc A21=0x10074483
A22=0x7ee17fff A23=0x3252b3
A24=0x510a1102 A25=0xeed7ffbb
A26=0xff28db6f A27=0xf5fe7bbf
A28=0x0 A29=0x8022979c
A30=0x7f A31=0x0
B0=0x1 B1=0x0
B2=0x0 B3=0x8020a1c8
B4=0x4 B5=0x80229aa2
B6=0xd8c0010 B7=0x80229694
B8=0x1000 B9=0x80
B10=0x90 B11=0x1
B12=0x4 B13=0x80224c80
B14=0x8022f614 B15=0x8022d830
B16=0x0 B17=0x8022d8c0
B18=0xff B19=0x20
B20=0x20 B21=0x69
B22=0xffffffff B23=0xfffffffb
B24=0x7f7adefb B25=0xffefcfaf
B26=0xf1cffeff B27=0xbef7bbdf
B28=0xffb3fdff B29=0x637f9f7b
B30=0xffffffff B31=0xc000088
NTSR=0x1000c
ITSR=0x0
IRP=0x0
SSR=0x0
AMR=0x0
RILC=0x0
ILC=0x0
Exception at 0x0
EFR=0x2 NRP=0x0
Internal exception: IERR=0x1
Instruction fetch exception
ti.sysbios.family.c64p.Exception: line 248: E_exceptionMin: pc = 0x00000000, sp = 0x8022d830.

Any ideas on how this is happening? Thanks very much.

  • 0
    TI__Mastermind 20790 points

    Hi,

    I do not know why this is happening on your end. The below wiki pages will be helpful to better understand.

    http://processors.wiki.ti.com/index.php/IPC_Users_Guide/Notify_Module

    http://processors.wiki.ti.com/index.php/IPC_Users_Guide/Optimizing_IPC_Applications

  • 0 in reply to Pubesh
    Prodigy 120 points

    Thanks for replying,

    I have read the above documents on IPC. In fact I didn't modify anything except the platform compared to the notify_multicore example.

    My further tests show that when code or data memory changed from L2SRAM to DDR3 or MSMCSRAM, the problem will occur. and in the ROV I found that several exception are thrown before crash:

    ti.sdo.ipc.notifyDrivers.NotifyDriverShm Caught exception in view init code: Error: Error fetching Notify instance view

    I can't find why this happen in the documents. Any information about the exception? Thank you.

    Regards,

    Li

  • 0 in reply to Li Zhang2
    TI__Mastermind 20790 points

    Li,

    If possible share your test code to investigate and give the technical suggestion on the same.

  • 0 in reply to Pubesh
    Prodigy 120 points

    Here is the components I'm testing on

    XDCtools 3.25.6.96

    IPC 3.23.0.01/1.24.3.32

    SYS/BIOS 6.33.6.50

    I'm testing using the C6678 Notify example comes with IPC. Nothing else is added.

    The platform is changed as follow (memory sections are set to DDR3)

    I'm using evmc6678l.gel comes with CCS6 to initialize DDR3; Boot mode is set to no boot.

    Note that on my end when the memory sections (code/data/stack) are set to something other than L2SRAM (MSMCSRAM or DDR3), there will be a problem. Look forward to your reply.

    Regards,

    Li

  • 0 in reply to Li Zhang2
    TI__Mastermind 20790 points

    Li,

    Share your test project to look this issue, if possible.

  • 0 in reply to Pubesh
    Prodigy 120 points

    Hi, Pubesh,

    Thanks for your patience. The test project is attached. Modified platform is in the project folder.

    Regards,

    Li

    6355.notify.zip

  • 0 in reply to Pubesh
    Prodigy 120 points

    Now it's clear that only when the data section changed to MSMCSRAM or DDR3 will cause problems, other 2 sections seem irrelevant.

    When data section set to MSMCSRAM or DDR3, there will be 2 exceptions

    ti.sdo.ipc.heaps.HeapMemMP:Corrupted state: The value of 'objType' is not one of known types

    ti.sdo.ipc.notifyDrivers.NotifyDriverShm:Caught exception in view init code: Error: Error fetching Notify instance view