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ADC interrupt failures in TI-RTOS with TM4C123 launchpad

Dale Tardiff
Intellectual 545 points

Hello:

I am building an application on the TM4C123 launchpad using TI-RTOS.

The launchpad is mounted to an application board that provides ADC inputs.

I have previously successfully read the ADCs, with non-RTOS code.

For this application, I prefer to trigger the ADC using TIMER2, and then have theADC issue its interrupt to indicate that data is available.

So, I have configured both TIMER2 and the ADC HWI in the SYS/BIOS app.cfg script.

I have ISRs for both TIMER2 and the ADC.

This is the issue I have:

The ADC ISR never seems to be called.

In 1 attempt, when I halt the code and examine registers, the ADC0 SS1 interrupt is not enabled in the NVIC registers. I attempted to solve this by adding the line IntEnable(31); to my code. This now enables the ADC SS1 interrupt in the appropriate register. However, I have found that as soon as the execution reaches this IntEnable statement, it aborts. 

As best as I can tell, it appears that the TIMER2 interrupt triggers the ADC, leaving the ADC interrupt pending. When the IntEnable statement is reached, the task this staement resides in is pre-empted. (When viewing Tasks in the ROV, the task is marked PREempted.)

I have placed breakpoints in both the TIMER2 and ADC ISRs.

The TIMER breakpoint is reached, but the ADC breakpoint is never reached.

To configure the ADC trigger and interrupts, I used the APIs in the TIVA Peripheral library.

I am using version 2.1.0.12573 for TivaWare, and version 2.1.00.03 of TI-RTOS for Tiva. 

Is there a better set of APIs to use to configure and activate the ADC trigger and interrupts?

Or, any other advice to get past this?

If necessary, I have alternative method I plan to try to read the ADCs, but would prefer to synchronize with the timer.

Thank you

Dale

  • 0
    TI__Expert 8175 points

    Dale,

    Can I see the segment of code in your app.cfg file where you set up the ADC Hwi? Also it would help if I see the code where you configure the ADC peripheral using the tivaware API's.

    Dale Tardiff said:

    In 1 attempt, when I halt the code and examine registers, the ADC0 SS1 interrupt is not enabled in the NVIC registers. I attempted to solve this by adding the line IntEnable(31); to my code. This now enables the ADC SS1 interrupt in the appropriate register. However, I have found that as soon as the execution reaches this IntEnable statement, it aborts. 

    As best as I can tell, it appears that the TIMER2 interrupt triggers the ADC, leaving the ADC interrupt pending. When the IntEnable statement is reached, the task this staement resides in is pre-empted. (When viewing Tasks in the ROV, the task is marked PREempted.)

    In the 2 paragraphs above, you mention the application aborting when it hits the IntEnable function (first paragraph) and also the task being preempted (second paragraph). Can you clarify that a little more?

    Thanks,

    Moses

  • 0 in reply to Moses Isang
    Intellectual 545 points

    Hi Moses:

    I examined the app.cfg screen to prepare to send it to you, and I noticed that I used the Interrupt number (15) instead of the vector number (31) to configure the ADC interrupt. I changed that , and it is now working properly. 

    Thank you for looking into this; sorry I didn't pick up on this before I posted.

    Dale