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CPU does not wake up to run the Task after a post to the Task from an HWI.

Other Parts Discussed in Thread: MSP430F5437A, SYSBIOS

Hi,

I am having an issue with waking up the CPU to run a task after a post from an HWI.

BIOS:                6.41.00.26 (issue also seen in 6.40.02.27)
Processor:        MSP430F5437A
Compiler:          MSP430 4.3.3
CCS:                 6.0.1.00040

Description:

I have an HWI setup to transmit and receive bytes via I2C of USCI_B and a Task that sends the start condition and pends for the last byte to be transmitted/received and a stop condition to be sent. Once the HWI routine sends the stop condition, it will do a post to the Task such that the Task can continue on.

The system operates in LPM2 and CPU Idle has been enabled so that during TX/RX of the I2C, the CPU will switch to LPM2 until the I2C triggers a TX/RX interrupt or post to the Task.

Issue:

The issue is, after the stop condition has been sent, a post to the task and the HWI exits, the pending task does not run and so the system remains in Idle waiting for another interrupt.  If another interrupt occurs, the CPU will wake up, service the interrupt and the Task that was suppose to run previously, will run.

I took a look at the ROV when the CPU is in Idle after the post to the Task and it shows from the callstack that the Task is indeed in the "Running" mode. However it also shows that the

ti_sysbios_knl_Task_allBlockedFunction_I()

has been called. Can I assume that SYS/BIOS calls this function when it determines that no tasks are able to run and thus transitions the CPU to the Idle state? The ROV also shows that the Task's stack has not peaked or overflowed.

Notes:

- This issue manifested when I ramped MCLK up from default 8.192 MHz (DCO divide 2) to 16.384 MHz. I made sure to set the VCore to the appropriate level to accomodate this change. Under 8.192 MHz the issue is not observed.

- The data transmitted/received on the I2C is verified to be correct.

- When adding a small delay, __delay_cycles(100) which under 16.384 MHz works out to be roughly 6.1 microseconds, to the start of the HWI the issue goes away.

- Calling the Power_wakeCPU() function after the post to the task within the HWI does not resolve the issue.

Thanks for looking into this issue,

Bryon

  • Oh I forgot to mention that if I disable LPM and keep the CPU active at all times, the issue does not occur.
  • Bryon,

    Thanks for your very detailed problem description.  

    It is good to hear that this is working as expected at the default MCLK and voltage level.  

    When do you boost MCLK and VCORE?  In main()?

    When you change MCLK are you also changing SMCLK?  I’m wondering if maybe a driver is assuming the slower SMCLK rate, and a faster rate is somehow affecting timing and the LPM transition.  This is just a guess.

    If you are changing ACLK or SMCLK rates from the default, these need to be specified using the “ClockFreqs” module.  Are you doing this?  This module shows up in the “Device Specific Support” page in XGCONF, as “MSP430 Clock Frequencies”.   The values can be entered in the GUI, or by directly editing the application .cfg file, for example:

    var ClockFreqs = xdc.useModule('ti.sysbios.family.msp430.ClockFreqs');
    ClockFreqs.ACLK = 31250;
    ClockFreqs.SMCLK = 400000;

    A new MCLK frequency should be configured in the “Basic Runtime Options” page in XGCONF, or this can be specified in the .cfg file too, for example:

    BIOS.cpuFreq.lo = 16384000;

    Scott

  • Hi Scott,

    Thanks again for looking into this issue.

    Q: When do you boost MCLK and VCORE?  In main()?


    A: I step VCORE up 1 level at a time using the PMM_setVCoreUp API and checking for STATUS_SUCCESS before boosting MCLK.  All of this is done within main prior to BIOS_start.

    Q: When you change MCLK are you also changing SMCLK?


    A: I am only changing MCLK also configured the new MCLK frequency in XGCONF.  SMCLK is kept at default 8192000 Hz.  I tried adding in the ClockFreqs module anyways even though ACLK and SMCLK are kept at default.  The issue persists.

    I have several I2C devices hooked up to the MCU module.  I then tried dividing down the SMCLK by different factors and at 1024000 Hz the issue I was having for one particular I2C device was gone.  However, for a different one, it was present again.

    Bryon

  • Hi Bryon,

    OK, thanks. It seems that what you are doing should work.

    I just looked at the device errata (http://www.ti.com/lit/er/slaz288l/slaz288l.pdf).  There are a few issues related to PMM and wakeup from LPM modes.  Do you think any of these might apply for your use case?  Are you using SVS?

    Also, can you please post the code snippet you are using to boost MCLK and Vcore?

    Thanks,
    Scott

  • Hi Scott,

    I had a look at the device errata and they do not appear to be related.  SVS is left at default and I believe it is enabled.  Below is a code snippet of how I am boosting Vcore and then MCLK.

    	// Local variables.
    	int i = (PMMCTL0 & (PMMCOREV0 | PMMCOREV1));	// Reads the current Vcore.
    
    	// Increase the Vcore level by one and check if successful.
    	for (i += 1; i <= Target_Level; i++) {
    		if (STATUS_SUCCESS != PMM_setVCoreUp(i)) {
    			return STATUS_FAIL;
    		}
    	}
    
    	return STATUS_SUCCESS;

    Once Vcore has been successfully set,

    	UCS_clockSignalInit(UCS_MCLK, UCS_DCOCLK_SELECT, UCS_CLOCK_DIVIDER_1);

    Thanks,

    Bryon

  • Bryon,

    OK, thanks for the additional information.

    I need to discuss this with the device apps team to see if they have any ideas why the delay is needed.  I will get back to you as soon as I know more…

    Scott