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TM4C129xNCZAD SYS/BIOS failure

Other Parts Discussed in Thread: TM4C129XNCZAD, SYSBIOS

Hi,

We are using Tiva TM4C129xNCZAD in one of our custom boards running sys/bios (v6.40.1.15). Tiva controller is getting stuck during boot some times when board is power on. Connecting to CCS using JTAG at this stage shows below stack status. Some times function call sequence will be slightly different on error but ti_sysbios_family_arm_lm4_Timer_masterEnable__I will be involved in every errors case. Are there any know issues which can cause failure of this function?

abort() at exit.c:117 0x000110CE

exit(int)() at exit.c:108 0x000110F8
xdc_runtime_System_exit_E(int)() at System.c:86 0x000126E8
ti_sysbios_BIOS_exitFunc_I(int)() at app_pem4f/c:2,984 0x0001271c
ti_sysbios_family_arm_m3_Hwi_excHandlerMax__I(unsigned int *, unsigned int)() at Hwi.c:920 0x0000C3E8
ti_sysbios_family_arm_m3_Hwi_excHandler__I(unsigned int *, unsigned int)() at Hwi.c:812 0x00012340
ti_sysbios_family_arm_lm4_Timer_masterEnable__I() [tiva_test.out] at 0xFFFFFFF8
abort() at exit.c:117 0x000110CF
0x0000000C (no symbols are defined for 0x0000000C)

- Pratap.

  • Hello Pratap,

    Can you check the NVIC Fault Stat and Address register in CCS? You can use the following link to see how to access the fault status and address register

    e2e.ti.com/.../374640

    Regards
    Amit
  • Hi Amit,

    Please check below values of fault status registers
    NVIC FAULTSTAT - 0x00010000
    NVIC HFAULTSTAT - 0x40000000
    NVIC FAULTADDR - 0xE00EDF8

    We see hard fault exception is encountered and system goes to infinite loop in exit() function from BIOS exception handler. Is there a way to find what is causing the exception?


    - Pratap.
  • Hello Pratap,

    It is an Undefined instruction fault. And on how to diagnose the same.

    Regards

    Amit

  • Hi Amit,

    Thanks for the details.

    What can cause undefined instruction fault. Can it be execution error or program load error to RAM? Is there a documentation to describe how to handle this exception?

    Regards,
    Pratap.
  • Hello Pratap,

    Check the compilation options. Unless a processor compile option is incorrectly given, it may be a wrong opcode for the architecture. The PC value in stack would contain the undefined instruction location which can be used to trace the instruction.

    If this is in the TIRTOS kernel then do check with the TIRTOS follks on your project settings.

    Regards
    Amit
  • Hi Amit,

    We are using TI SYS/BIOS. Sure, I will post a query on TIRTOS forum.

    This issue is observed randomly and system works most of the times. Is there a possibility that compiler options cause random failures?

    - Pratap.
  • Hello Pratap,

    We would need to isolate the issue function to identify the same. Alternatively did you try increasing the stack size?

    Regards
    Amit
  • Hi Amit,

    We tried increasing the stack size but it did not help.

    - Pratap.
  • Hello Pratap

    You must check with TI RTOS Team and isolate the function(s) that cause the same.

    Regards
    Amit
  • Thanks Amit. Should I start a new discussion or can you move this thread to RTOS forum?

    - Pratap.
  • Hi,

    Some more debugging info on this issue.

    Below is the call stack sequence when system is hung 

    We have replaced SP, PC and LR register values from ROV exception handler data. Below is the snapshot of function at new PC which is supposed to be initiating the exception based on ROV data.

      

    - What can cause undefined instruction error?. Do we need to set any specific compiler options to avoid this?

    - Exception handlers in call stack displayed by CCS are with names xxx_arm_m3_HWI. Is this a right function to use with Tiva C M4 core? Are there a specific handlers for M4?.

    -  What does the function ti_catalog_arm_cortexm4_tiva_ce_Boot_sysCtlClockFreqSet() shown in above picture supposed to do. Just setting the CPU clock? Are there any specific project/platform settings to avoid errors while executing this function.

    - Is there any documentation or SYS/BIOS examples to demonstrate the handling of hard faults in application specific custom exception handlers?

    Below are the details of setup we are using

    Tiva - TM4C129xNCZAD

    SYS/BIOS - 6.40.1.15

    CCS - v6

    - Pratap.

  • Hi Pratap,

    Boot_sysCtlClockFreqSet() is run during boot to set the clock & PLL frequencies.  Since you said you are on your own custom board, what is the oscillator crystal frequency?  Did you update the Boot module in your cfg file?  Can you post your config file?

    Additionally, you can step through the function to find where the exception is actually being triggered.  First, launch your target configuration session and turn off Run to Main (Tools->Debugger Options->Auto Run and Launch Options).  Reset the processor and load the program.  You can use the Disassembly window to set a break-point on the the first instruction of Boot_sysCtlClockFreqSet function.  Should look something like this:

    At this point you can step through the source code and see where you are getting stuck.

    Regards,

    -- Emmanuel

  • Hi Emmanuel,

    Thank you for your response.

    We are using 25MHz crystal for Tiva clock input. We have not done any changes specific to boot module in the config file. Please find our bios config file attached. 0525.app.zip

    Below is the snapshot of the clock set function when exception happens. Highlighted line is the last instruction executed in the function.

      

    We tried disabling the clock config during boot using Boot.configureClock = false;. But when we try to configure the clock in main using MAP_SysCtlClockFreqSet(), system hangs.

    - Pratap.

  • Hi Emmanuel,

    Any feedback on the details I have shared in the previous post?

    We have experimented different configurations and always see that code hangs while configuring the clock in sys/bios. Are there any know issues or specific configurations related to sys/bios clock configurations?

    We are using the platform TM4C129xNCZAD (SNOWFLAKE_RA2) and SYS/BIOS version 6.40.1.15.

    - Pratap.
  • Hi Pratap,

    Thanks for the screen shot, but what was being executed (in the Boot_sysCtlClockFreqSet() function) before the exception is triggered? Can you step through the Boot_sysCtlClockFreqSet function and tell me what was being executed? Sorry if I was unclear before.
    Regards,
    -- Emmanuel
  • Hi Emmanuel,

    This issue is observed randomly and it is hard to reproduce it by running the program using JTAG. I can not single step and see the instruction being executed by Boot_sysCtlClockFreqSet() before exception but I can trace back to the instruction using call stack once the exception happens during boot by connecting JTAG. Point from where the exception is triggered is not consistent but it is within the clock configuration function.

    Is there a way that we can exclude clock configuration during bios initialization and configure it properly in the main?.

    - Pratap.
  • Hi Pratap,

    Sorry for the delay, I did not see your response.  Out of curiosity, have you tried running other non TI-RTOS applications?  Are you experiencing the same problem?

    Yes, you can exclude the default clock configuration by adding the following to your *.cfg file:

    var Boot = xdc.useModule('ti.catalog.arm.cortexm4.tiva.ce.Boot');
    Boot.configureClock = false;

    You can then manually configure the clocks in either a reset function (recommended) or in main.  

    Reset function code below:

      // get handle to xdc Startup module
      var Startup = xdc.useModule('xdc.runtime.Startup');
    
      // install "reset function"
      Startup.resetFxn = '&myReset';

    Regards,

    -- Emmanuel

  • Hi Emmanuel,

    Thank you for the reply.

    We tested a simple application with out OS and not observed any issue. We have not tried with any OS other than TI-RTOS.

    We tried disabling the clock during bios init and configuring it in main function but still observing the hang issue some times. We will try to configure the clock in reset function.

    BTW, is there any SYS/BIOS errata specific to Tiva? Is there a SYS/BIOS user guide for Stellaris to Tiva migration?.

    - Pratap.
  • Hi Pratap,

    Unfortunately, we do not have an errata or an migration doc for SYS/BIOS on Tiva.

    Regards,
    -- Emmanuel
  • Hi Emmanuel,

    We are able to find the root cause and fix the issue. Clock input to Tiva controller is having some unstable behavior which needs additional capacitors in the circuitry to make it stable. Due to unstable clock input, program goes to invalid state which was caught as exception by sys/bios.

    Thank you for all your support.

    Regards,
    Pratap.