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problem reclocking SYS/BIOS app

Other Parts Discussed in Thread: TMS320F28335

Using TMS320F28335 with SYS/BIOS 6.34.2.18 and an external 30MHz crystal.


I have an application that has been running well for the last year. the DSP is clocked at 60MHz (PLLCR[DIV]=4, PLLSTS[DIVSEL]=2).
I am now trying to institute a low power state by reclocking to 15MHz.
I update the PLL to PLLCR[DIV]=1, PLLSTS[DIVSEL]=2. This seems to take fine.

I then go to update the SYS/BIOS clock using:
 
 BIOS_getCpuFreq(&cpuFreq);
 cpuFreq.lo = 15000000;
 BIOS_setCpuFreq(&cpuFreq);

 Uint16 key;
 key = Hwi_disable();
 Clock_tickStop();
 Clock_tickReconfig();
 Clock_tickStart();
 Hwi_restore(key);

I can then do a "BIOS_getCpuFreq(&cpuFreq);" and it returns 15MHz as the frequency.

I have a SYS/BIOS clock that fires once every half second, which has worked fine for the last year.
When I restart this clock with SYS/BIOS now at the new lower frequency, it fires roughly once every five seconds.

Am I missing some steps in the reclocking or reconfiguring of the clock?

Thanks,
Bruce

  • Anyone from TI around to take a look at this? I'm still seeing the results described above.
    Thanks,
    Bruce.
  • Hi Bruce,I am going to move this post to the SYS/BIOS forum.
  • Bruce,

    It isn’t obvious why this doesn’t work.

    Can you check the return value from Clock_tickReconfig() to make sure it is TRUE?

    And what is the Clock.tickPeriod?

    And can you show how you are setting the timeout for the clock object you want to fire every half second?

    Thanks,
    Scott

  • Thanks for the reply Scott.

    Clock_tickReconfig returns 1.
    Clock.tickPeriod is 1000, that is set originally in the .cfg file, and isn't changed when I change the frequency from 60MHz to 15MHz.
    The timeout for the clock is also set in the .cfg file with an initial timeout of 10 and a Period of 500. The clock is not set to start at when instance is created, but I start it right after I do the HWI_restore in the code above.

    Thanks again for your help Scott.
    Bruce.

  • Bruce,

    OK, thanks.  It is still not clear what might be going wrong.

    I don’t have a 28335 handy, but tried using the same reconfig sequence with an MSP432 device blinking an LED while dynamically scaling the CPU frequency at runtime.  That basic test worked as expected; without your reconfig sequence the LED rate varied, but with the reconfig after scaling it always blinked at the expected fixed rate. 

    How exactly are you reprogramming the PLL?  After setting the new multiplier value are you waiting for the PLL to relock?   Have you verified that the generated clock is indeed 15MHz?   And have you maybe tried statically starting at 15MHz rather than dynamically scaling to it, to see if that runs as expected?

    Thanks,
    Scott

  • Hi Scott,
    I am setting the PLL using the InitSysCtrl function from DSP2833x_SysCtrl.c
    Yes I am waiting for the PLL to reclock, verifying the results of the clock change through the SYSCTRL registers.
    DIVSEL is 2 and PLLCR is 1 with a 30Mhz Crystal should be 30/2 = 15MHz.
    Can you tell me what versions of SYS/BIOS SDOCM00077418 and SDOCM00077874 were solved in?
    Thanks,
    Bruce
  • Hi Bruce,

    OK, thanks.

    Both SDOCM00077418 and SDOCM00077874 were fixed in 6.31.03.24.

    Can you clarify where you are changing the PLL, and where you are making the Clock reconfiguration calls?  Is this in main()?  If not, can you try that as an experiment?

    Thanks,
    Scott

  • Hi Scott,
    To clearify where the changing of the PLL is happening, it happens after I have started up sys/Bios, under certain conditions I have a clock that fires a swi, inside that swi is a function that calls InitSysCtrl (Which calls InitPll). This is not in main().

    From watching the SYSCTRL registers (PLLSTS.PLLLOCKS and PLLCR.DIV registers), I'm quite sure the PLL is being reconfigured OK, but I'll try your experiment and get back to you in a few days.

    Thanks,
    Bruce
  • Hi again Scott,

    I hooked up a scope to XCLKOUT, I am getting a nice steady 15MHz before I reclock, and a nice steady 3.75MHz after I reclock. XCLKOUT gives SYSCLKOUT/4 so everything there looks good. This looked good both when I moved the reclock procedure into main, and when it was called through SYS/BIOS. The problem is still pointing to something with SYS/BIOS and clocking.

    Thanks,
    Bruce
  • Hi Bruce,

    Thanks for verifying the PLL frequency, and for trying from main() too.

    I will try to recreate this on a C28 board with the same versions of SW components as you are using. I will get back when I know more...

    It will help a lot if you can post your .cfg file, and the C file where you are programming the PLL, reconfiguring Clock, and starting your periodic Clock.  If you don't want to post it to the forum there is a 'friend' option on the forum that will allow you to send them to me privately.  If I can see the exact sequence of your configuration and C code it will help a lot...  Can you do that?

    Thanks,
    Scott

  • Hi Bruce,

    I saw and accepted your friend request.  Can you please send my your C and .cfg file?

    Thanks,
    Scott