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Where can I find API documentation?

Other Parts Discussed in Thread: CONTROLSUITE

I'm looking for API documentation for TI-RTOS.  By way of example: searching for "IntMasterDisable" gives me a few hits but does not give me a page that says "here's what the function does, and here are related calls (Is there an "IntMasterEnable"?  Should I use HWI_disable/HWI_restore?  What are the use cases for both?).

Also: where is the documentation that indicates Shared Memory configuration is reset in _c_int00?

No, the SYS/BIOS "User's Guide" does not have this level of info.

What are the magic keywords to add to a search to find this stuff, either on the TI site itself or via a global Google search?  I'll use either one... but surely there must be some way to get this info.

Also: if you provide a URL like 

software-dl.ti.com/.../index.html

Then please provide some directions for how to get there by following links on the TI website. Bonus points for (a) fewer than 10 clicks to find it, and (b) having a searchable interface to the API documentation.

Thanks!

  • What device are you using?

    For the MCU device (MSP43x, CC32xx, CC13xx, CC26xx, C2000, TM4C) we have a TI-RTOS stand-alone product. There is a top-level docs/Documentation_Overview.html file. This is a good start. You can get to this either in the installed product or via a link in the release notes.

    For the processors family (e.g. C6000, OMAP, DaVinci, AM3xx, AM4xx, etc.), please refer to the documentation in the processor's SDK.

    Specifically, should you use IntMasterEnable or HWI_disable/HWI_restore. For the MCU devices, there is driverlib. This contains lower-level APIs that can be used in a non-RTOS environment. So without TI-RTOS, you would use IntMasterEnable. When you use TI-RTOS, it manages the vector table. So you would use the Hwi module. Please note, the TI-RTOS drivers are built on top of the devices driverlib.

    I'm not quite sure what you mean by "Also: where is the documentation that indicates Shared Memory configuration is reset in _c_int00?"

    Todd
  • Todd,

    I'm using a part from the F28M36 family, which I think is considered to be an MCU (ARM Cortex M3, C28xx DSP).  I've searched the documentation and did not find the API described (for example, I just did a full file search in C:\ti\tirtos_c2000_2_16_01_14\docs for "RAMMReqSharedMemAccess", but there was nothing).

    You described the IntMasterEnable (and other functions); where would I find the documentation for this?  I appreciate the help, but it will be much more efficient if I can look up API documentation myself rather than asking a question on the TI forums every time I need something different.  :-)

    With respect to the Shared Memory configuration: I have my own bootloader on the ARM/M3 side that configures shared memory in a specific way so some of that memory is allocated to the C28xx.  The C28's app is then released to run, and the ARM bootloader does some work before turning control over to a TI RTOS-based app ("MyApp").  My C28xx app kept crashing, and I chased it down to a statement in the _c_int00 code for "MyApp" that resets the shared memory configuration.  This seems like a rather important fact, and I fear that I missed it in my reading... and I perhaps may have missed some other important facts as well.  My question is: Where is this documented?

    Thanks!

  • Hmm... here's a simple question along the lines of "Where is the documentation?":

    I'm using an F28M36x part.  I have CCS 6.1.3.00034 running on Windows 10.  I have TI RTOS and controlSUITE installed and being used for my app.  I have my *.cfg file open in the CCS editor, and I'm looking at the "Boot - Boot/Startup Options" page where I see a checkbox labeled "Configure Shared RAM regions", along with the ability to set masks and owners and write access.

    My question: Where is the documentation for this page?

    I think this is the page I need, but the tooltip hints don't indicate values that should be used nor does a search (either via Google or in the various PDFs I've downloaded, nor in the CCS documentation) reveal information for the settings this page.  I've probably overlooked it somewhere; can you point me to the documentation for this?

    Thanks!

         -- Steve G.

  •  I have my *.cfg file open in the CCS editor, and I'm looking at the "Boot - Boot/Startup Options" page where I see a checkbox labeled "Configure Shared RAM regions", along with the ability to set masks and owners and write access.

    With CCS 6.1.3 and SYS/BIOS 6.45.01.29 when I clicked the help button on the "SYS/BIOS - Boot/Startup Options" page (the question mark on the top right of the .cfg editor) the CCS help opened a page for the ti.catalog.arm.cortexm3.concertoInit.Boot module which describes the options for the shared RAM regions:

    Does this answer your question?

    [This was for a SYS/BIOS example project for the CortexM core of a F28M36x device]

  • That probably would have been helpful, but it didn't work on my system.  I'd tried it before I posted, and just now tried it again to verify.  The Help System pops up on other pages, but the little question-mark-in-a-circle is disabled on this page.

  • You can open this from any browser (you don't to use CCS). Open top-level docs/Documentation_Overview.html file and then click "TI-RTOS Kernel Runtime APIs and Configuration (cdoc)". You can navigate to the ti.catalog.arm.cortexm3.concertoInit.Boot module.

    Todd
  • I went to that location but did not see "arm" in the catalog; only c2800 (see the image below/attached).  Did I expand the wrong part of the tree?

  • No. Looks like arm was filtered out. I opened a bug for this.

    You can look at the release notes on the download site. It's here: software-dl.ti.com/.../index.html

    Todd
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