• Not Answered

TI WinCE6 BSP 6.15: Data Abort error when accessing INTC register

We upgraded our device from TI BSP 6.13 to 6.15 recently. We did not see this data abort when using 6.13.

The processor is TI AM3715 ES1.2 @ 800MHz (and OMAP3530 / DM3730 as well).

The data abort happened when resuming, and ramdomly happened when accessing the INTC register in OEMInterruptHandler():

                   Exception 'Data Abort'(4) Thread-Id=00db0002(pth=ffffc360) PC=81a11418 BVA=a1100040, dwInfo = 00001008

                       R0=81a2f404  R1=60000113  R2=a1100000  R3=86209e98

                       R4=00000000  R5=8620a584  R6=8620df20  R7=81a2f404

                       R8=00000001  R9=00000002 R10=8620b248 R11=8620b248

                       R12=81a34f98  SP=ffffc4b0  Lr=81a34fb0 Psr=60000193

Logical Address 0xa110,0040 was mapped to the hysical address 0x4820,0040 (INTC_SIR_IRQ), according to the MMU translation table (TTBR1).

The PC Address 0x81a1,1418 (-8)  is exactly the instruction which reading the INTC_SIR_IRQ register.

The MMU fault status register (MMU-C5) reported 0x0000,1008 which is "precise external abort, nontranslation".

It has been noticed, in resuming, the very first INTC register reading is always success. This data abort happened ramdomly sometime later in the middle of resuming. 

I implemented the ERRATA 1.105 but not help (MPU Leaves MSTANDBY State Before IDLEREQ of Interrupt Controller is Released).

My question is: 

1.  Does it possible the Interrupt Controller Register becoming unavailable while the MPU are running?

2.  What's the possible bad PRCM machine-state which may result in this trouble?

I appreciate your help, thanks

Hans

 

3 Replies

  • This is an issue we discovered and that is due to the INTC clock that is sometimes not settled when you try to access the INTC registers. One quick & dirty workaround you could use is to add some call to OALStall after activating the clocks in prcm_device:

    static

    void

    _PrcmDeviceAddrefDeviceDomain(UINT powerDomain)

    {

    ...

    // generate a software supervised wake-up to enable clock domain

                PrcmDomainSetClockState(powerDomain,
                                 s_rgClockDomainDependency[powerDomain].clockDomain,
                                 CLKSTCTRL_WAKEUP
                              );
     
                 OALStall(10000);
     
                 PrcmDomainSetClockState(powerDomain,\r
                               s_rgClockDomainDependency[powerDomain].clockDomain,
                              CLKSTCTRL_AUTOMATIC
                                 );

    ...

    }

     

     

  • In reply to Adeneo Embedded support team:

    Thank you very much, really appreciate your help.

    I implemented your change, however, I noticed another problem ---

    The MPU occassionally halt or hung after writing the USBHOST_PRM (Physical Address 0x4830,7400) register PM_WKDEP_USBHOST (offset 0xC8):

           //  ... WinCE/OAL/PRCM/prcm_domain.c

           static BOOL _PrcmDomainHwUpdate(UINT powerDomain, UINT ffMask) {

                  .......................

                if  (ffMask & DOMAIN_UPDATE_WKUPDEP) {

                         OALMSG(powerDomain == POWERDOMAIN_USBHOST, (L"@%08X", pm_wkdep));

                         OUTREG32(&pPrmRegs->PM_WKDEP_xxx, pm_wkdep);

                         OALMSG(powerDomain == POWERDOMAIN_USBHOST, (L"$\r\n"));

                 }

             }

    This halt or hung problem only randomly happen in resuming stage while in PowerUp() routine (thread priority 0), when updating register PM_WKDEP_USBHOST (0x4830,74c8) to 0x0000,0002 (USB HOST domain is woken-up upon MPU domain wake-up).

    Just before it update PM_WKDEP_USBHOST to 0x2, the MPU domian is on, but the USB HOST domian is off. So PRCM should wake up the USB Host domain immediately upon this instruction. In most case it is fine but occassionally fail ---- the MPU for some reason halt or hung because I did not see the "$" sign.

    Any suggestion how this could happen? Thanks.

    P.S. This is the PRCM register dump (when resuming just before the hung):

    IVA2_CM:

      CM_FCLKEN_IVA2           0x00000000

      CM_CLKEN_PLL_IVA2        0x0000021f

      CM_IDLEST_IVA2           0x00000001

      CM_IDLEST_PLL_IVA2       0x00000000

      CM_AUTOIDLE_PLL_IVA2     0x00000001

      CM_CLKSEL1_PLL_IVA2      0x0008640b

      CM_CLKSEL2_PLL_IVA2      0x00000001

      CM_CLKSTCTRL_IVA2        0x00000003

      CM_CLKSTST_IVA2          0x00000000

     

    OCP_System_Reg_CM:

      CM_REVISION              0x00000010

      CM_SYSCONFIG             0x00000001

     

    MPU_CM:

      CM_CLKEN_PLL_MPU         0x0000021f

      CM_IDLEST_MPU            0x00000000

      CM_IDLEST_PLL_MPU        0x00000001

      CM_AUTOIDLE_PLL_MPU      0x00000001

      CM_CLKSEL1_PLL_MPU       0x000b200b

      CM_CLKSEL2_PLL_MPU       0x00000001

      CM_CLKSTCTRL_MPU         0x00000003

      CM_CLKSTST_MPU           0x00000001

     

    CORE_CM:

      CM_FCLKEN1_CORE          0x00000000

      CM_FCLKEN3_CORE          0x00000000

      CM_ICLKEN1_CORE          0x00000042

      CM_ICLKEN2_CORE          0x00000000

      CM_ICLKEN3_CORE          0x00000000

      CM_IDLEST1_CORE          0xffffffbd

      CM_IDLEST2_CORE          0x0000001f

      CM_IDLEST3_CORE          0x0000000d

      CM_AUTOIDLE1_CORE        0x7ffffed8

      CM_AUTOIDLE2_CORE        0x0000001f

      CM_AUTOIDLE3_CORE        0x00000004

      CM_CLKSEL_CORE           0x0000110a

      CM_CLKSTCTRL_CORE        0x0000003f

      CM_CLKSTST_CORE          0x00000003

     

    SGX_CM:

      CM_FCLKEN_SGX            0x00000000

      CM_ICLKEN_SGX            0x00000000

      CM_IDLEST_SGX            0x00000001

      CM_CLKSEL_SGX            0x00000000

      CM_SLEEPDEP_SGX          0x00000000

      CM_CLKSTCTRL_SGX         0x00000003

      CM_CLKSTST_SGX           0x00000000

     

    WKUP_CM:

      CM_FCLKEN_WKUP           0x00000009

      CM_ICLKEN_WKUP           0x00000009

      CM_IDLEST_WKUP           0x000002f6

      CM_AUTOIDLE_WKUP         0x0000003f

      CM_CLKSEL_WKUP           0x00000014

     

    Clock_Control_Reg_CM:

      CM_CLKEN_PLL             0x001f001f

      CM_CLKEN2_PLL            0x0000001f

      CM_IDLEST_CKGEN          0x00000001

      CM_IDLEST2_CKGEN         0x00000000

      CM_AUTOIDLE_PLL          0x00000009

      CM_AUTOIDLE2_PLL         0x00000001

      CM_CLKSEL1_PLL           0x09900b00

      CM_CLKSEL2_PLL           0x0443600b

      CM_CLKSEL3_PLL           0x00000009

      CM_CLKSEL4_PLL           0x0000780b

      CM_CLKSEL5_PLL           0x00000001

      CM_CLKOUT_CTRL           0x00000001

     

    DSS_CM:

      CM_FCLKEN_DSS            0x00000000

      CM_ICLKEN_DSS            0x00000000

      CM_IDLEST_DSS            0x00000003

      CM_AUTOIDLE_DSS          0x00000001

      CM_CLKSEL_DSS            0x00001009

      CM_SLEEPDEP_DSS          0x00000000

      CM_CLKSTCTRL_DSS         0x00000003

      CM_CLKSTST_DSS           0x00000000

     

    CAM_CM:

      CM_FCLKEN_CAM            0x00000000

      CM_ICLKEN_CAM            0x00000000

      CM_IDLEST_CAM            0x00000001

      CM_AUTOIDLE_CAM          0x00000001

      CM_CLKSEL_CAM            0x00000004

      CM_SLEEPDEP_CAM          0x00000000

      CM_CLKSTCTRL_CAM         0x00000003

      CM_CLKSTST_CAM           0x00000000

     

    PER_CM:

      CM_FCLKEN_PER            0x0003e008

      CM_ICLKEN_PER            0x0003e008

      CM_IDLEST_PER            0x00041ff7

      CM_AUTOIDLE_PER          0x0007ffff

      CM_CLKSEL_PER            0x00000000

      CM_SLEEPDEP_PER          0x00000002

      CM_CLKSTCTRL_PER         0x00000003

      CM_CLKSTST_PER           0x00000001

     

    EMU_CM:

      CM_CLKSEL1_EMU           0x03020a50

      CM_CLKSTCTRL_EMU         0x00000003

      CM_CLKSTST_EMU           0x00000000

      CM_CLKSEL2_EMU           0x00000000

      CM_CLKSEL3_EMU           0x00000000

     

    Global_Reg_CM:

      CM_POLCTRL               0x00000000

     

    NEON_CM:

      CM_IDLEST_NEON           0x00000000

      CM_CLKSTCTRL_NEON        0x00000003

     

    USBHOST_CM:

      CM_FCLKEN_USBHOST        0x00000003

      CM_ICLKEN_USBHOST        0x00000000

      CM_IDLEST_USBHOST        0x00000003

      CM_AUTOIDLE_USBHOST      0x00000001

      CM_SLEEPDEP_USBHOST      0x00000002

      CM_CLKSTCTRL_USBHOST     0x00000003

      CM_CLKSTST_USBHOST       0x00000000

     

    IVA2_PRM:

      RM_RSTCTRL_IVA2          0x00000007

      RM_RSTST_IVA2            0x00000000

      PM_WKDEP_IVA2            0x00000000

      PM_PWSTCTRL_IVA2         0x00ff0f04

      PM_PWSTST_IVA2           0x00000000

      PM_PREPWSTST_IVA2        0x00000000

      PRM_IRQSTATUS_IVA2       0x00000001

      PRM_IRQENABLE_IVA2       0x00000000

     

    OCP_System_Reg_PRM:

      PRM_REVISION             0x00000010

      PRM_SYSCONFIG            0x00000001

      PRM_IRQSTATUS_MPU        0x08000010

      PRM_IRQENABLE_MPU        0x01c926a0

     

    MPU_PRM:

      RM_RSTST_MPU             0x00000000

      PM_WKDEP_MPU             0x00000000

      PM_EVGENCTRL_MPU         0x00000012

      PM_EVGENONTIM_MPU        0x00000000

      PM_EVGENOFFTIM_MPU       0x00000000

      PM_PWSTCTRL_MPU          0x00030105

      PM_PWSTST_MPU            0x000000c7

      PM_PREPWSTST_MPU         0x00000045

     

    CORE_PRM:

      RM_RSTST_CORE            0x00000000

      PM_WKEN1_CORE            0x00000000

      PM_MPUGRPSEL1_CORE       0xc33ffe18

      PM_IVA2GRPSEL1_CORE      0xc33ffe18

      PM_WKST1_CORE            0x00000000

      PM_WKST3_CORE            0x00000000

      PM_PWSTCTRL_CORE         0x000f0301

      PM_PWSTST_CORE           0x000000f7

      PM_PREPWSTST_CORE        0x00000055

      PM_WKEN3_CORE            0x00000000

      PM_IVA2GRPSEL3_CORE      0x00000004

      PM_MPUGRPSEL3_CORE       0x00000004

     

    SGX_PRM:

      RM_RSTST_SGX             0x00000000

      PM_WKDEP_SGX             0x00000000

      PM_PWSTCTRL_SGX          0x00030104

      PM_PWSTST_SGX            0x00000000

      PM_PREPWSTST_SGX         0x00000000

     

    WKUP_PRM:

      PM_WKEN_WKUP             0x0000000b

      PM_MPUGRPSEL_WKUP        0x000003cb

      PM_IVA2GRPSEL_WKUP       0x00000000

      PM_WKST_WKUP             0x00000000

     

    Clock_Control_Reg_PRM:

      PRM_CLKSEL               0x00000000

      PRM_CLKOUT_CTRL          0x00000000

     

    DSS_PRM:

      RM_RSTST_DSS             0x00000004

      PM_WKEN_DSS              0x00000000

      PM_WKDEP_DSS             0x00000000

      PM_PWSTCTRL_DSS          0x00030104

      PM_PWSTST_DSS            0x00000000

      PM_PREPWSTST_DSS         0x00000000

     

    CAM_PRM:

      RM_RSTST_CAM             0x00000000

      PM_WKDEP_CAM             0x00000000

      PM_PWSTCTRL_CAM          0x00030104

      PM_PWSTST_CAM            0x00000000

      PM_PREPWSTST_CAM         0x00000000

     

    PER_PRM:

      RM_RSTST_PER             0x00000000

      PM_WKEN_PER              0x0003e008

      PM_MPUGRPSEL_PER         0x0003efff

      PM_IVA2GRPSEL_PER        0x0007efff

      PM_WKST_PER              0x00000000

      PM_WKDEP_PER             0x00000003

      PM_PWSTCTRL_PER          0x00030105

      PM_PWSTST_PER            0x00000007

      PM_PREPWSTST_PER         0x00000005

     

    EMU_PRM:

      RM_RSTST_EMU             0x00000000

      PM_PWSTST_EMU            0x00000000

     

    Global_Reg_PRM:

      PRM_VC_SMPS_SA           0x00650065

      PRM_VC_SMPS_VOL_RA       0x00000001

      PRM_VC_SMPS_CMD_RA       0x00000001

      PRM_VC_CMD_VAL_0         0x7f7f5000

      PRM_VC_CMD_VAL_1         0x73735000

      PRM_VC_CH_CONF           0x00170000

      PRM_VC_I2C_CFG           0x00000000

      PRM_VC_BYPASS_VAL        0x00000000

      PRM_RSTCTRL              0x00000000

      PRM_RSTTIME              0x00001006

      PRM_RSTST                0x00000000

      PRM_VOLTCTRL             0x00000002

      PRM_SRAM_PCHARGE         0x00000050

      PRM_CLKSRC_CTRL          0x00000050

      PRM_OBS                  0x00000000

      PRM_VOLTSETUP1           0x02ee02ee

      PRM_VOLTOFFSET           0x00000000

      PRM_CLKSETUP             0x00000004

      PRM_POLCTRL              0x00000002

      PRM_VOLTSETUP2           0x00000000

     

    NEON_PRM:

      RM_RSTST_NEON            0x00000000

      PM_WKDEP_NEON            0x00000002

      PM_PWSTCTRL_NEON         0x00000005

      PM_PWSTST_NEON           0x00000003

      PM_PREPWSTST_NEON        0x00000001

     

    USBHOST_PRM:

      RM_RSTST_USBHOST         0x00000004

      PM_WKEN_USBHOST          0x00000000

      PM_MPUGRPSEL_USBHOST     0x00000001

      PM_IVA2GRPSEL_USBHOST    0x00000001

      PM_WKST_USBHOST          0x00000000

      PM_WKDEP_USBHOST         0x00000000

      PM_PWSTCTRL_USBHOST      0x00030104

      PM_PWSTST_USBHOST        0x00000000

      PM_PREPWSTST_USBHOST     0x00000000

    @00000002      // No '$' sign and the system hung

  • In reply to Hans Huang:

    Hans - I realize that your post is from quite a while ago, but the symptoms that you describe are VERY similar to an issue that we've been working on.  Did you resolve the issue of the MPU Hang / Halt when the PM_WKDEP_USBHOST register is written?  What did you do?