NAND Isuue - Number Of Partial Pages

Hi Team,

My customer is using AM37303 with WINCE 6 OS and Micron NAND 4-bits ECC MT29F4G16ABBDAHC-IT.

After testing the device with Stress tests of reading and writing random files to the file system it looks that there are problems:

1. First Issue
   1. During page programming we store the 28 bytes of ECC result in flash spare area.  
   2. In process of page reading we received from controller the same ECC result but the data has not correct at least in one bit.
   3. Second Issue:
      1. The program process succeed both  for  page and for spare area.
      2. On reading we see that the spare area has broken. As result our file system is fatally corrupted.
      3. The most failures occurred in pages with higher numbers approximately start from 100 000.

After a lot of investigations, a critical issue was raised:

There is a different between the number of partial pages which required by the Partition manager In WINCE when the wear leveling feature is enable(5 NOP) and

between the max number of partial pages which defined in the Nand datasheet.

1. Are you familiar with this issue?
2. A question that was raised by my customer  – How does this issue is solved with the new EVMs like AM335x EVM where WINCE is supported?
3. Another problem that was raised by my customer is that the spare area is corrupted and they want to cover this area with the ECC. You can see below my customer questions.

 During continues investigation I see that lot of the problem isn’t in an error correction method but it is in a corruption of the spare are.

If the spare area doesn’t covered by ECC, the invalid information about page will pass to the wear leveling part of the FSD. It means that storage may be destructed completely because the corruption the single page’s spare area.

I believe that the spare area’s guarding by ECC may solve the problem. How to do this?

1. We must choose a proper wrapping mode
2. Decode via BCH decoder more data then one page.

Currently we use the wrapping mode 6 for read and mode 9 for write. It means that ECC engine is inactive during spare are read/write.

We must to choose the different wrapping mode to cover the spare area by ECC. (7 for write and 3 for read or something like)

Here we have some trebles.

Is it possible?

Can you to direct us to right source?

Can you please advice on his questions?

Best Regards,

Eran