Section 7.1.3.3.12.3.3.2 of the AM335X TRM (SPRUH73J) describes various schemes that can be used by the GPMC to map the out-of-band/spare area of a NAND Flash. The WinCE BSP for the AM335X uses scheme M7, in which the spare data is not protected by the ECC, which prevents the Flash File system from mounting if a non-ECC spare bit (such as one used for the logical-to-physical sector mapping) is corrupted. We have seen this occur after repartitioning the Flash (which entails erasing all blocks), but occasionally one such OOB bit is not successfully erased, despite the driver having reported a completed and successful erasure.
Scheme M5 would seem to offer an improvement on this situation, as it covers the non-ECC spares with the ECC of sector 0. My questions are:
- Is there a reason the M5 scheme was not used in the BSP?
- Since the documentation says that 512 bytes are covered by the ECC, does this mean that some of the bytes in the data sector are no longer covered, or that their protection is in some way lessened by protecting the OOB data?
- Is there example code demonstrating the use of the M5 scheme in correcting OOB data errors?
Given the fatality of this condition and the ubiquity of Flash technology I am surprised not to see this discussed elsewhere. We have SYSBOOT configured to disable the boot ROM after XLDR has come up.