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Quesiton about XIO2001

g.f.
Guru 15510 points
Other Parts Discussed in Thread: XIO2001

Hi,

I have a question about XIO2001.

At my customer's system, they are using XIO2001.
In an evaluation test, the deadlock of OS has occured and
they are searching what cause the deadlock.

They are guessing that the deadlock will occur when XIO20001 is in a high loading state.
Because it occurs when increasing the load of PCI card but
decreasing the load of PCI card, the deadlock won't occur.

XIO2001 supports six PCI bus devices but they are only connecting 3 PCI bus devices
and the PCI bus clock is 33MHz.

Is there any information about the same phenomenon?
If there is a factor which can be considered, please let me know.

best regards,
g.f.

  • 0
    TI__Guru* 76130 points

    Hello,

    Are you using external arbiter?

    Deadlock is not quite dependent on the number of devices, you can have only two and have deadlocks.

    Can you provide more details on your set-up and the type of transactions taking place when the issue occurs?

    What is the high-level failure description? system hang-up ? failed transaction? ...

    Regards

  • 0 in reply to Elias Villegas M.
    Guru 15510 points

    Hi Elias,

    Thank you for the reply and I'm sorry for the delay.

    Actually, this problem occured at my customer.

    They aren't using external arbiter.

    When the problem occured, the system won't recognize the input of keyboard and
    the monitoring screen stops in the state of drawing.
    It seems that CPU had stopped. And also CPU doesn't receive NMI.

    I don't know this will answer to your question but this is the information as far as I know.

    By the way, the customer are changing the "Pre-Fetch Agent Request Limits Register" of XIO2001
    as following:
    initial value = 0x0443 and changed to 0x0000

    When they changed this register value to 0x0000, it seems that problem isn't occuring.
    The customer have questions about "Pre-Fetch Agent Request Limits Register".
    1.What is this register for and what kind of function is it?

    2.If a setup of this register is changed into a preset value from an initial value,
      how does operation of a bridge change?
     
    best regards,
    g.f.

  • 0 in reply to g.f.
    Guru 243910 points

    The auto pre-fetch agent is decribed in section 8.3.14 of the datasheet:

    The auto pre-fetch agent is an internal logic module that will generate speculative read requests on behalf of a PCI master to improve upstream memory read performance.

    The auto pre-fetch agent will generate a read thread on the PCI-express bus when it receives an upstream prefetchable memory read request on the PCI bus. A read thread is a sequence of one or more read requests with contiguous read addresses. The first read of thread will be started by a master on the PCI bus requesting a read that is forwarded to the root complex by the bridge. Each subsequent read in the thread will be initiated by the auto pre-fetch agent. Each subsequent read will use the address that immediately follows the last address of data in the previous read of the thread. Each read request in the thread will be assigned to an upstream request processor. The pre-fetch agent can issue reads for two threads at one time, alternating between the threads.

    Prefetching will amplify a PCI read request into multiple PCI-E read requests. Apparently, the system cannot handle that many requests.

    How exactly do those PCI devices read from main memory? What burst size do they use?

  • 0 in reply to Clemens Ladisch
    Guru 15510 points

    Hi Clemens,

    Thank you for the reply.

    I checked the part of datasheet which you told to me.

    I'm sorry but I don't have an imformation about the burst size.
    Is this burst size related to "Pre-Fetch Agent Request Limits Register"?

    best regards,
    g.f.

  • 0 in reply to g.f.
    Guru 243910 points

    The burst size is the size of PCI reads. Unfortunately, a PCI read request never explicitly specifies its size; the target is supposed to continuously provide data unless the master stops accepting read results.

    PCI-E read requests always require a size (read requests and results are packets with relatively high latency). A PCI/PCI-E bridge has to guess what size to use; this is what the "Pre-Fetch Agent Request Limits Register" is for.

    By default, each PCI read request will result in the bridge requesting four packets with 512 bytes each. This is fine if the PCI device reads data in large bursts (which are required for high-performance devices anyway), but if the PCI device uses many small reads, all those prefetch packets might be too much.

    What kind of PCI device are you using? What kind of data does it read from main memory, and how fast?