SN75DP130 to FPGA (termination and ac coupling)

Justin Erfan

Other Parts Discussed in Thread: SN65LVDS100, SN75DP130

I want to connect the SN75DP130's AUN_SNK pins to the FPGA via the SN65LVDS100 voltage translator because the FPGA I/O banks only accepts 1.2V or 1.8V. Does anyone have recommendations on termination/coupling between the SN65LVDS100 and the SN75DP130? Also as a sanity check, does the connection from the DP130 to the FPGA seem reasonable using this translator?

over 9 years ago

0 Diego Cortes over 9 years ago

TI__Mastermind 36085 points

Hello Justin,

I am reviewing your post and I will reply ASAP.
Regards,
Diego.

0 Aperture^2 over 9 years ago in reply to Diego Cortes

Prodigy 75 points

Hi Diego,

When can we expect an answer?

Thanks,
Frank

0 Diego Cortes over 9 years ago

TI__Mastermind 36085 points

Hello Justin,

The path SN75DP130 -> SN65LVDS100 its feacible, however I am not sure about the SN65LVDS100 -> Zynq path. Could you share the recommended input conditions for the Xilinx FPGA.

Best regards,
Diego.

Interface

Interface forum

SN75DP130 to FPGA (termination and ac coupling)