SN65DSI86 Link Training Issue

user1248665

Other Parts Discussed in Thread: SN65DSI86

I got some problem about SN65DSI86.

When I try to bring up the panel i got information from SN65DSI86 which say SemiAuto Link training fail(reg 0xF8 = 0x12).

But, the DPCD 202h show that the panel was link training done (DPCD 202h got the 0x77).

Why?

Any suggestion?

Thanks for reply!

over 8 years ago

0 Joel Jimenez0 over 8 years ago

TI__Mastermind 18655 points

Did you enable ASSR in panel before starting semi auto link training?

Regards,
Joel

0 user1248665 over 8 years ago in reply to Joel Jimenez0

Prodigy 40 points

Joel Jimenez0 said:

Did you enable ASSR in panel before starting semi auto link training?

Regards,
Joel

Hi Joel：

Thanks for reply!

I enable ASSR in panel before starting link training.

The DPCD 10Ah shows that 0x03 (ASSR enable and Framing Changing enable).

0 Joel Jimenez0 over 8 years ago in reply to user1248665

TI__Mastermind 18655 points

Hello,

When training multiple lanes, Align also must be set. Is INTERLANE_ALIGN_DONE set?

Please, read the sink's DPCD address at 00202h thru 00204h and provide the status.

Regards,
Joel

0 user1248665 over 8 years ago in reply to Joel Jimenez0

Prodigy 40 points

Hi Joel,

Here are some status about DPCD 00202h to 00204h.

DPCD 00202h = 0x77

DPCD 00203h = 0x00

PS. DP Main Link = 2 lane

DPCD 00204h = 0x01

PS2. INTERLANE_ALIGN_DONE Set

Thanks for reply.

Jimmy

0 Joel Jimenez0 over 8 years ago in reply to user1248665

TI__Mastermind 18655 points

Hello Jimmy,

We will need to see an AUX analyzer capture of the link training process to understand what would be failing.

Our guess is the status flags in the panel is not getting set until Loop_Count in below diagram is greater than 5. This diagram was taken from DisplayPort 1.2a standard.

0 user1248665 over 8 years ago in reply to Joel Jimenez0

Prodigy 40 points

Hi Joel:

I found that DPCD 202h will transition from 0x77 into 0x11 after a while.

Besides, the INTERLANE_ALIGN_DONE unset !

Are there any suggestion that I need to determine? Panel or DSI86?

Thanks for reply.

Jimmy

0 vinesh peringat over 7 years ago in reply to user1248665

Prodigy 10 points

Hi Joel and Jimmy,
I would like to know the rootcause of issue reason why DPCD 202h will transition from 0x77 into 0x11 after a while and INTERLANE_ALIGN_DONE unset !

I am facing similar issue with another produce, your thoughts on the issue you have discussed in the thread should give us some light.

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SN65DSI86 Link Training Issue