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XIO3130 intermitent fail to be detected

Other Parts Discussed in Thread: XIO3130

We have a card with a XIO3130. The upstream port is connected to the root port of an Intel Atom N2800 / NM10 south bridge. Two of the downstream ports are connected to Intel 82574 Ethernet ctrl, and the third downstream is going to a Lattice FPGA. We have produced hundred of these cards and the great majority are working well. But on a few cards, we have an intermitent bug that we are unable to fix or understand.

Bug description:  when booting windows 7 embedded, sometimes the XIO3130 device is not detected, and also the 3 dowstream devices. If we run TopHat, the XIO3130 is simply not there. If we reboot the problem usually clears itself. The frequency of the bug occurences vary a lot from card to card. It could be once every 10 reboot, to once every 100 reboot. If we warm up the XIO3130 with a heat gun, it seems to increase to bug occurences.

The XIO3130 does not have a EEPROM, and the DNx_DPSTRP pins are connected to GROUND. We tried to connect the DNx_DPSTRP pins to +3.3V (hotplug mode) but it does not help. We tried to put an EEPROM with different configuration (normal, hotplug, home made config with L1 mode disabled) but nothing helps. We checked the timing of UP_REFCKIN relative to UP_PERST_N, and there 100ms of stable clock before reset is released. Our digital scope has a 1GHz bandwidth, it is not great to check on UP_PET_P/N, UP_PERP/N but we can see activity.

We are really clueless what to do next. Do you have any suggestions?

  • Hello,

    Can you tell the lot code of the failing units?
    Would you be able to ship to us some failing and some passing devices?
    Can you put a failing XIO3130 in a passing board to see if the failure follows the part?
    Regards
  • Dear guru,

    Attached is a picture of a XIO3130 that fails to be detected the most often. Hopefully the lot code is the second line that could be seen easily. I think it is premature to conclude that the XIO3130 is buggy yet. We wish to discuss with you about the possible causes, and what tests we could performed to help determine where the bug is located. Later if the XIO3130 is found to be defective we will discuss of the possibilities to unsolder one and ship it to you.

    We think that the problem occurs during the enumeration only. Because if the device is detected correctly at first, the link stays active while windows is running even when we heat up the XIO3130 with a heat gun. Apparently the enumeration is fragile. How sensitive would be the XIO3130 against noise on its supply or the reference clock? We tried our best to copy the evaluation board schematic for all the decoupling capacitor and ferrite beeds on the supplies.  Maybe some supply pins would need more capacitance than what is shown in the evaluation board? Regarding the external bias resistor on pin REFR0/REFR1, is it possible that is some situation the value needs to be trimmed especially if the XIO3130 is very close to the root complex device?

    We have just rented a PCIE analyser, we will try to hook it up and see what happen during enumeration.

    Thanks for all the help,

    GV

  • I hope you are back from Thanks giving holiday because this issue is becoming very problematic for us. If you suspect a bad XIO3130 device, can you elaborate, is there an history of problem on specific lot codes? If so can you share the lot codes having problem. I am going to make more test today, first I will insure that the clock UP_REFCKIN is as clean as possible by tuning the terminaison resistors. Then I wil disconnect all downstream device to insure they dont affect the switch in any manner. If we determine that the XIO3130 is defective we will definitively send it to you. How quickly can you analyse a defective XIO3130, weeks or months?
  • Hello,
    We are not aware of more issues like this.
    Have you been able to hook the PCIe analyzer up?
    I am not from QA department, but I would assume it will take weeks not months.
    Regards
  • Mr Villegas,


    We have hooked up the PCIE analyser and captured the packets in both cases: normal XIO3130 startup, and buggy XIO3130 startup. What we see when the bug occurs is that the XIO3130 does not make its PCI PETN/P link up after the PCIRST is rising. It appears to occur randomly. We have tried to find a glitch on REFCKI or on the power supplies that could affect XIO3130 but could not see anything wrong. We will make more test around the REFCKI to really make sure it is glitch free. After that, in a few days, we will ask YOU for the permission to send back an XIO3130 devices for analysis at Texas Instruments facilities.

    Do you have any suggestion on what could possibly prevent a XIO3130 to become 'link up' after PCIRST_N is rising to '1'.

    Are you interested in the PCIE analyser capture files? The files are huge and you need Teledyne/Lecroy application to view them; perhaps this optiosn is not usable for you. An lighter alternative is: we can do screen captures of the interesting portions and save them into JPG or PNG format. What do you think?

    Best Regards,

    Gilbert Vellet

  • Is it possible to move my case to higher priority? I need help and cannot wait 3 days between each small answer!!!!!!
  • Hello Gilbert,

    I will rise the priority of your case, I will contact you by email so you can send me the PCIe traces, the lecroy format works for me.

    You can also send me the schematics for review via email.

    What do you mean by "link up" ? 

    Have you verified the power-up sequence, I wrong power-up sequence could lead to detection issues. 

    Regards