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TUSB2046B / power-on RESET timing

Guru 29690 points
Other Parts Discussed in Thread: TUSB2046B

Hi Team,

The datasheet shows the following about power-on RESET timing.




On the other hand, the following thread shows it is possible for reset timing up to 3ms.
>Texas Instruments recommends a minimum of 100 µs to a maximum of 3 ms of reset timing.
http://e2e.ti.com/support/interface/digital_interface/f/130/t/478474

I would like to confirm if it is possible to 3ms(MAX) of reset timing just in case.

Best Regards,
Yaita

  • Hi

    I heard 6MHz crystal output (XTAL2) starts to oscillate approximately 2ms after VCC rises up on my customer's board.
    So it isn't possible to achieve following requirement of red underline if reset pulse should be less than 1ms.



    Best Regards,
    Yaita

  • Hello Yaita,

    Actually, as per USB 2.0 spec an USB device must respond before 100ms after 3.3V Vcc reaches its 90%..We recommend a minimum of 100 µs to a maximum of 3 ms of reset timing. If the hub is held in reset for a longer period of time, it can fail to respond promptly to USB host signaling and not complete enumeration. This is typically an issue with embedded system applications.

    Regards,
    Joel

  • Hi Joel-san,

    Thank you for your support.
    I would like to ask an additional question.

    My customer considers power-on reset timing as the following.
    -Power-on reset(#RESET) is released after not only VCC rises up but also VBUS(5V) is detected.

    If he adopt the timing above, I think it doesn't meet the following timing requirement.
    >Actually, as per USB 2.0 spec an USB device must respond before 100ms after 3.3V Vcc reaches its 90%..We recommend a minimum of 100 µs to a maximum of 3 ms of reset timing.

    Does it come to an issue?

    Best Regards,
    Yaita

  • Hello Yaita-san,

    It should work.

    Please, see the attached reference design, it has VBUS detection and implements the  reset with a simple RC circuit (15K pull-up resistor and 1 uF cap).

    2046-EVM-Sch-new.PDF

    Regards

  • Hi Joel-san,

    My customer wants to assert reset of TUSB2046B each time when USB cable is connected or disconnected.
    So he considers to design as the following.
    >-Power-on reset(#RESET) is released after not only VCC rises up but also VBUS(5V) is detected.

    Do you think it is reasonable design for TUSB2046B? Is there any concern?

    Best Regards,
    Yaita

  • I aplogize for bothering but my cutomer wants to know it as soon as possible.
    Could you tell me if you have any concern?
    Your support would be really appreciated.

    Best Regards,
    Yaita

  • Hello Yaita-san,

    >-Power-on reset(#RESET) is released after not only VCC rises up but also VBUS(5V) is detected.

    I don't think there will be an issue with this implementation.  I can double check the customer's schematics, please send them to joel.jimenez@ti.com.

    Regards,

  • Hi Joel-san,

    Thank you for your reply!
    Let me please contact you again when I get my customer's schematic.

    Best Regards,
    Yaita