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SN65DP159: about I2C speed changing issue of SN65DP159RSBT

Part Number: SN65DP159

Hi dear supporting team,

customer is using SN65DP159, and found they could not read the monitor EBID information,  after debugging, they found it is due to the I2C reading failure,  when system lauching writing "0 " to 0xa0, SLK is 33kHz, if they continue reading 0xA1 256bytes, they will find dp159 turn into 88k speed, and with this speed, there will be NACK in the I2C line when doing the continuous reading.   

so below are the questions:

1. how is the I2C speed determined?

2. how to keep DP159 from changing 33k to 88k? 

the regs are basically default value including 0x22.   do you have other debugging suggeston? tks a lot! 

  • Can you provide a schematic and let me know which SCLK frequency is being measured? There are 3 different SCLKs on the device.

    Thanks!
    JMMN
  • Hi JMMN,
    thank you for the reply! could I send the sch to your email? what's your email address? tks a lot!
  • I have sent you a friend request. Please accept and send me the schematic.

    Thanks!
    JMMN
  • Hi Vera,

    The SN65DP159 defaults to 100 kHz operation. The first write on I2C is sometimes done at a slower rate, but 100 Khz (or in this case 88 Khz with loading) should be supported by the sink. The DDC rate can be adjusted by writing register 22h in the adaptor ID described in section 9.5.1 of the datasheet. If they are seeing issues with the DP159 I2C performance, they can configure the DP159 in DDC snoop mode where SCL_SRC and SDA_SRC are grounded and only SCL_SNK and SDA_SNK are connected.

    Regards,
    JMNN