Hi!
As my first post on this forum, I'd like to ask a question about chip select interfacing.
I'm designing a board which will include a microcontroller and a SRAM module.
As you know, both the microcontroller and the SRAM have a chip select pin.
The microcontroller will use a SPI port with a Chip Select pin to drive the Chip Select pin of the SRAM high or low.
I want to keep the SRAM powered with a goldcap/supercap for a while when the power supply of the microcontroller dies out.
The /SS pin is low active. This also means that the /SS pin will be 0V at a power failure..
The problem is that I need to keep the /SS pin of the SRAM in a high-state due to its SPI characteristics.
The solution to this point is to simply add a pull-up resistor on the /SS line between the microcontroller and the SRAM and hook it up to the goldcap.
But when I look into the datasheet of the microcontroller, it tells me that the I/O pins may never be any more than Vcc ± 0.3V. As Vcc is 0V in a power down-state, the input can never be more than 0.3V.
So when I use the above mentioned solution, the I/O pin of the processor will be 3V3 and probably will be fried..
Any (chip) suggestions to this interfacing problem?
