Hi Group,
I have a requirement to select from up to 8 filters (one at a time) from a bank. Using 2 analog multiplexers is the obvious way. The bandwidth is up to 50MHz, but the problem is high capacitance.
The filters have capacitors at their inputs, so the switch capacitance can be neutralised by reducing the physical capacitors. But the TS5N118 (and similar from other makers) do not specify any tolerence of the switch capacitance, only for the TS5N118 a maximum.
Does anyone have any idea how much this parameter "spreads" on analog switches please? if 10% then the design is feasible. If 50% then it will be difficult. I just would like a ballpark idea if someone on this group has more experience than me.
Thanks,
Rob.
Hi Rob
I think you are asking for on capacitance variance across process. It doesn’t seem to vary much at all. It does vary some across temp. I have attached some data.
In the labels on the columns you will see something like LO_Nom. This will mean Low temp nominal material.
Hi Chris,
Yes the variance across process is what I was after. As you say it is pretty consistent, but about 40% change over temp. Are those figures over the wide -40 to +85C recommended operating conditions (picking on TS5N118)?
Fortunately my circuit is for indoor or "protected" outdoor situations where it will see 0C to 40C at worst. The variations on most of your figures are approx 40%. Assuming a linear scaling of the temperature variations, that says 12.8% over a 40C range by my reckoning. Which will be fine if I use accurate capacitors for the filters in the first place.
Thankyou for this... I will proceed on with the design!
~Rob