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System Level ESD protection - IEC61000
Hello TI Engineers and company,
I would like a clarification on a devices that you offer for ESD System level protection; e.g., TPD4S012. The target application is a portable DAQ for medical instrumentation and it will, of course, some with an USB interface to be connected to a computer.
What has sparked a heated debate here is the use of these devices to ensure our system meets 15kV air discharge/contact ESD ratings as one level spelled out in the IEC61000 4-2. Although we have not investigated it at this time we do know that there are specially rated connectors, from Spectrum Control, that integrate ESD protection and are rated for 15kV air/contact. The rub of course is cost and availability of USB type connectors.
How can the TPD4S012 and other similar devices from TI as well as your competitors claim IEC 61000 compliance when it is a system level standard and not a component standard as is covered by JEDEC? I am by no means an ESD expert, but the reading I have done so far implies that rating an intergrated circuit to the IEC 61000 system test is dubious. I have also heard (nothing in print) that different systems; i.e., board layout, is the big unknown in repeatability for component testing to meet IEC 61000. One system will pass while the other may fail. I have posed this question to several of your competitors and received nebulous responses in return.
The real question is this: Since you claim IEC 61000 compliance on your device even though it is a system level test, then do you test the component in accordance to the IEC 61000 setup in a generic system and rate the device accordingly?
Thank you in advance for your sage advice.
My name is Wolfgang Kemper and I am the actual designer of the TPD4s012.
You have very good question. Actually we spend a lot of time at TI in discussions about this.
Our concept is to build up in our lab the worst case scenario for the IEC protection and test it so that in the real application the customer do not have to worry about the performance.
And yes it is all according to the IEC 61000-4-2 spec.
We sometimes scarify IEC levels just to be sure we hit the worst case scenario.
The tpd4s012 is a is a good example for this policy. Our worst case setup is not giving the usual 8kV/15kV relation but we decided not to "bend" the setup to achieve this. So we have decided to show 10kV/10kV for it .
Just as a remark on our Airgap test. The IEC spec tells you to test contact wherever you have exposed connectors and airgap when you can not do a contact discharge (For exaple the whole device is encapsulated) However we do zap the IO pins directly with contact and air discharge even if airgap would not be required according to the IEC spec.
In fact many of our customer see a much higher ESD performance in their systems than we do guarantee on our datasheets.
But we need also the help of our customer to select the right ESD protection for their application and follow a few design recommendations
For applications in the frequency range of USB 2.0 the best way to protect the system is to place the IEC protection as close as possible to the connector.
However there should be no significant inductance after the IEC clamp and before the device you want to protect.
If you need some guidelines please feel free to contact your local sales representative or post the question here in the forum.
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