TI E2E Community
PCA9555 datasheet clarification needed
I just recently dicovered the sentence in PCA/TCA9555 datasheet, stating "The address inputs (A0–A2) of the slave device must not be changed between the Start and Stop conditions" on page 6 (SCPS200A–JULY 2009–REVISED JULY 2009).
Holds this true on its own? To be more specific: Is this true even if the PCA9555 isn't concerned at all with the current I²C-transaction?
Background: To multiply count of addressable PCA9555s, I'm (miss)using address inputs as some kind of chip select: Only one of many PCAs will be switched to an operated address, while the other ones remains switched to a non-used address. In order to do this, my approach is: output port of one PCA9555 (first-stage PCA) drives address input of up to 16 other (second-stage) PCA9555s. All 17 PCAs are connected to the same I²C bus. As changes of PCA9555's outputs take place immediately during ACK, address inputs of the 16 second-stage PCA9555s changes in the middle of I²C-transaction to the first-stage PCA. Of course neither the address before, nor the one afterwards matches the address of the first-stage PCA.
The context of datasheet leads to the conclusion that the statement cited at the beginning applies only to the currently addressed device – as if it reads "The address inputs (A0–A2) of this slave device must not be changed between the Start and Stop conditions."
Experience says that it works, savvy says it, too – but: are there any pitfalls/drawbacks?
Thanks in advance for any clarification – Peter
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