• State TI Thinks Resolved
  • Locked Locked
  • Replies 4 replies
  • Answers 1 answer
  • Subscribers 33 subscribers
  • Views 833 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

PCA9306 isolates when VREF1 is off?

Thibault
Intellectual 295 points
Other Parts Discussed in Thread: PCA9306

Dear all,

I need to make an I2C level translation beetween a 1.8V master and a 3V slave. For BOM optimization, I'm considering the PCA9306 (I'm using it for 1.2 to 3.3V I2C translation on the same board). I understand that the 1.8V supply should be on VREF1, the 3V on (VREF2+EN) through a ~200kOhm for proper component biasing.

The question is : My 3V will always be on, whereas sometimes (eco mode) the 1.8V will be shutdown. Does the PCA9306 isolates the 2 interfaces in this case or is there any currents flowing from SDA2 to SDA1, SCL2 to SCL1, VREF2 to VREF1?

I've also read on this forum some unanswered questions about the proper resistor biasing of the device, some having to increase the 'VREF2+EN' resistor value. What is the acceptable range for this value? Does it depends of RPU?

With best regards,

Thibault

  • 0
    TI__Expert 4150 points
    Hey Guys,

    I have the same question here. If VREF2 is driven at 3.3V, what happens if VREF1 is pulled to GND? Do the two sides isolate from each other?

    Don
  • 0 in reply to Don Schelle
    TI__Genius 16430 points

    Hello,

    If REF1 is pulled to ground, then the two switches will go into high-Z state.

    However, I wish to tell you that VREF2 should NOT be directly connected to 3.3V. It should be pulled up to the voltage rail through a 200k ohm resistor! This biases the internal MOSFET networks to allow for translation.

    VREF1 going to 0V will isolate the two sides, however, if VREF2 goes to ground, this is not necessarily true. This is why we suggest having EN and VREF2 directly connected to each other and then pulling the node up to the voltage rail through a 200k ohm resistor. If the EN input goes low, both sides will be disconnected/put into high-z state. Using this suggested configuration will ensure that if either VREF1 or VREF2 go low, that both sides will be isolated.

  • 0 in reply to Jonathan Valdez
    TI__Expert 4150 points

    Hello,

    I just want to confirm that a portion of your statement is a typo.   You said:

    ----

    If the EN input goes low, both sides will be connected.

    ----

    Shouldn't both sides be disconnected if the enable pin goes low?

    Don

  • 0 in reply to Don Schelle
    TI__Genius 16430 points
    Ah, my mistake. I've corrected my post. If the enable pin goes low, both sides will be put into high-Z state.