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PCA9544A / about internal circuit

Sho Ogane
Genius 5575 points

Hi all.

I have two questions about the  internal circuit of PCA9544.

1. I use this device the following case, is this device maintained without breakege?
・Vcc=0,  INT0_4=5V, A0_2=5V
I am concerned that this device be latch up breakege,
but I think this device has the protection from Input pin absolute voltage range. 

2. Does this device have parasitic diode in the internal route between input pin and Vcc?

Best Regards,
Sho

  • 0
    TI__Expert 5140 points

    Hi Sho,

    I'm looking into this and will get back to you soon.

    Thanks,

    Siby

  • 0
    TI__Expert 5140 points

    Hi Sho,

    Sorry for the delayed response. To answer your questions:

    1. I use this device the following case, is this device maintained without breakege?

    ・Vcc=0,  INT0_4=5V, A0_2=5V

    I am concerned that this device be latch up breakege,

    but I think this device has the protection from Input pin absolute voltage range.

    There is a concern that you can possibly break the ESD cell. However, the datasheet states that if the current is limited to 20mA then no damage will occur. If you do not limit the device, then it will break the device.

    2. Does this device have a parasitic diode in the internal route between input pin and Vcc?

    There is an ESD cell from the pin to GND and from the pin to VCC.

     

    Hope this helps!

    Siby

  • 0 in reply to Siby James
    Genius 5575 points

    Hi Siby san

    Thank you for the reply.
    I understood what you said.

    I have two questions.
    1.Is CMOS terminal following?
    　A0, A1, A2, INT0, INT1, INT2, INT3

    　So I think SDA, SCL, SC0, SC1, SC2, SC3, SD0, SD1, SD2, SD3 are not CMOS terminal?
    　Is my understand is correct?

    2.Does this device have the prevention of leakage current to Vcc when this device is power-off.

    I would like to get your comment as soon as possible.

    Best Regards,
    Sho

  • 0 in reply to Sho Ogane
    Genius 5575 points

    Hi Siby san

    I attached PDF file about my question.
    Please check it.

    When you answer my question,plase give me your anser  the following about which pin have ESD cell.
    For example
    ※Please check ○ or ×.
    SDA: ×
    SCL: ×
    INT:
    SD0:
    SD1:
    SD2:
    SD3:
    INT0:
    INT1;
    INT2:
    INT3:
    A0:
    A1:
    A2:

    Best Regards,
    Sho 

    PCA9544A question.pdf

  • 0 in reply to Sho Ogane
    TI__Expert 5140 points

    Hi Sho,

    I will answer the PDF questions first:

    1. Yes the pins you have stated are all the I/O pins. You forgot the INT pins as well.

    2. You may have different power supplies, but we recommend that your lowest channel voltage on your channels is EQUAL to the voltage of VCC.

    If you take a look at the Recommended Operating Conditions Table, you will see that the MAX voltage of some of those rows is VCC + 0.5 V. When seeing this  + 0.5 V" that will mean that there is an ESD on those specified cells. In the case of this device that will mean A0-A2, /INT3-/INT0 have the ESD Cell.

    SDA: o
    SCL: o
    INT: o 
    SD0: o
    SD1: o 
    SD2: o 
    SD3: o
    INT0 x
    INT1; x
    INT2: x
    INT3: x
    A0: x
    A1: x
    A2: x

    Hope this helps!

    Siby

  • 0 in reply to Siby James
    Genius 5575 points

    Hi Siby san

    Thank you for your reply.
    I would like to organaize about this question.

    Your comment " Yes the pins you have stated are all the I/O pins. You forgot the INT pins as well"
    ・Are /INT0_3 pins I/O pin?
    I see datasheet /INT0_3 recommend voltage range (Vh) is Vcc+0.5V, so I think  /IN0_3 is not tolerant funcion.
    When we use this device Vcc=0,SDA,SCL=5V, A0_2=5,  /INT0_3, which pin's ESD cell does it break?

    I attached tolerant circuit, please check.

    And your following answer,
    SDA: o
    SCL: o
    INT: o 
    SD0: o
    SD1: o 
    SD2: o 
    SD3: o
    INT0 x
    INT1; x
    INT2: x
    INT3: x
    A0: x
    A1: x
    A2: x

    〇 is the pin that has ESD cell
    × is  tehe pin that does not have ESD cell

    Is my understand OK?

    Best Regards,
    Sho Oganetolerant.pdf

  • 0 in reply to Sho Ogane
    TI__Expert 5140 points
    Hi Sho,

    Sorry if that's a little confusing, but what I mean is that the pins that have the VCC + 0.5 V spec will have the ESD configuration shown as (3) in your pdf, while all other pins will have configuration (1).

    To reiterate, the pins with O are (1)

    and the pins with X are (3)

    Thanks,
    Siby
  • 0 in reply to Siby James
    Genius 5575 points

    Hi Siby

    Thank you for your support!

    Best Rrgards,
    Sho