We are right in the middle of hardware qualification testing and we are seeing a low temperature problem with the TI voltage clamps that has not appeared prior to this.
We are currently using the SN74TVC16222A and SN74TVC3010 voltage clamps to translate a parallel ATA bus from +5VDC to +3.3VDC.
Everything runs well at +25 degrees C, but as the devices are cooled to -30 degrees C and below we start to get some units failing on the ATA bus. Sometimes it's just a file does not compare properly, other times the device cannot be recognized by the host at all. Other units work fine.
All of the other systems on the board seem nominal (DDR2, NAND flash, NOR flash, SPI flash etc.) and this happens to be the only bus that runs signals through voltage clamps.
The topology is as follows:
GATE and B1 (48, 47 on the 16222/ 24, 23 on 3010) pulled to +5VDC through a 200K Ohm, 1%, resistor.
Gate A1 Tied to +3.3VDC. A2 to A11 and A2 to A23 routed to respective signals on the FPGA.
B2-B11 (3010) and B2 to B23 pulled up to +5VDC through 4.7K Ohm, 1%, resistors.
Some units work at -40 degress C and others do not.
Should RDPU be lower to provide stiffer pull up once the drive from the A side has reached greater that +3.3VDC?
Or should the "typical" value of 200K for the Vbias and GATE resitor be changed?
it is belong to SLL product line.
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