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LSF0102 Level-Translation Problem

Other Parts Discussed in Thread: LSF0102

Hallo,

Our customer asks the LSF0102 Level-Translation Problem as below.
They use the attached schematics circuit.
But they can get the following output level clock signal.
  High level = 1.15V (almost OK)
  Low level = 0.8V (Not acceptable)
Could you please advise me how to solve the higher low-level (0.8V) and get proper 0V – 1.1V clock output?

Best Regards,

Kazu Ogawa