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Two-Channel Logic Level Translators

Other Parts Discussed in Thread: LSF0102

We have two digital sources which are 5V and 1.8V respectively and want to translate both of them to 3.3V and have them be exported through two channels (since the frequency of the two channels are different from each other). Is there any suitable product we can use?

  • Absolutely.

    <I am moving this thread to the voltage translation forum>

    The first solution that comes to mind is the LSF0102.  In order to do what you want, you would set Vref_A to 1.8 V and Vref_B to 3.3 V, and put both inputs into the 'A' side.  Since this part is over-voltage tolerant up to 7 V, the 5 V input will be down-translated to 3.3 V and the 1.8 V input will be up-translated to 3.3 V.

    An important note is that this is a passive translation device -- your input signal drivers will be responsible for pulling the output line low, so just make sure to select a pull-up resistor value that is appropriate to avoid excessive current sinking into the driver.  Also, A-side (input) pull-up resistors will not be required unless one of your outputs is open-drain. More information can be found in this application report.

  • Thank you for your help. A further question is if the A port input is 2V can I still set Vref(A) as 1.8V since 1.8V is a much commoner voltage than 2V, Thanks.
  • What's more, we are working on pico second application and we are wondering how is the delay in the level translator?

  • Is it possible if I need to put 2V input on the Ref A side and put 5V on the Ref B side. 

    In that case 2V will be up-translated to 3.3 V on the B side and 5V will be down-translated to 3.3V on the A side. 

    Because I saw the examples in the handbook of LSF0102 applied

    this kind of design which is the voltage on the B side will always higher than the corresponding A side, although it is more complicated. 

    Bests!

  • Hi Chris,
    I no longer work in this area, but I will be happy to try to answer your questions. I'm sorry to see that your earlier questions were missed. I left the logic group in TI around the same time that you posted those.

    If the low-side voltage is 1.8V, any voltage above that (up to the absolute maximum of the input) will be a valid input -- so 2 volts will be no problem.

    Timing down to picoseconds will likely be challenging with this part considering that it is a passive translator and relies on an output RC circuit to reach the required 'high' voltage (3.3 in your case). There is practically no propagation delay to speak of, however, so a sufficiently low pullup resistor can make the outputs respond very quickly. (Propagation delay is generally caused by how many layers of gates a signal must pass through prior to reaching the output -- here there is just 1 FET to go through).

    The device is symmetrical internally, so you can use A or B as the high side (technically). We recommend always using one to simplify our application examples and help our customers. As long as the EN pin and pullup resistor to the high voltage are connected properly, you shouldn't have any issues with this design.