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SN74LVC1T45 input leakage current

AIT GHRIB Abderrahman
Intellectual 430 points
Other Parts Discussed in Thread: SN74LVC1T45

Hi,

This an extract of the electrical characteristics table of SN74LVC1T45 : 

Is the data surrounded in red rectangular concerns only the DIR pin ? If yes, what is the input leakage current for ports A and B ?

Thank you in advance.

  • 0
    TI__Guru 55960 points
    Hi AIT ,

    I will move this into voltage translation forum for support.
  • 0
    TI__Expert 6335 points

    AIT,

    AIT GHRIB Abderrahman said:

    Is the data surrounded in red rectangular concerns only the DIR pin?

    Yes that is correct.

    AIT GHRIB Abderrahman said:

    What is the input leakage current for ports A and B ?

    I will get back to you on this.

    Best Regards,
    Nirav

  • 0 in reply to Nirav Patel
    Intellectual 430 points
    Hi Nirav,

    Is there any feedback regarding the second question?

    Thanks in advance.
  • 0 in reply to AIT GHRIB Abderrahman
    TI__Expert 6335 points
    SInce the A port and B port are CMOS Inputs, I would not expect moer than a few uA of input leakage current.

    Unfortunately I have not been able to make time in the lab to verify my expectations. I am on travel for most of this week, so I will try to address this on Friday. Thanks.

    Best Regards,
    Nirav
  • 0 in reply to Nirav Patel
    TI__Expert 6335 points

    AIT,

    Lab measurements are provided below. Leakage is much less than 1 uA for both pin A (when configured as an input with DIR pin = High) and pin B (when configured as an input with DIR pin = Low).

    My tests included IIH (Pin Leakage when configured to Logic High = VCC) and IIL (Pin Leakage when configured Logic Low = GND)

    Keep in mind the data below was collected on one unit and nominal operating temperature. Since this parameter is not specified in the datasheet, there is no characterization data that fully covers your request. However, I would not expect this measurement to significantly vary over PVT.

    Best Regards,
    Nirav