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Linux/TLK110: PHY TLK110

Part Number: TLK110

Tool/software: Linux

I have 2 PHY.circuit is designed for 1 as MII and other as RMII.

I got the linux PHY driver from TLK110 page directed to 3rd party page ---> “LINUX-DP83848:DP83848 (Supports DP83822 and TLK10x) Linux Driver“. 

RMII is working fine. But MII not.

My question is-

1. does the same driver work for both MII and RMII?

2. Do we need to configure PHY registers using driver functions (coding) to force it for MII.

if required i can attach driver.

vinayak

  • Hi Vinayak,

    MII and RMII are generally configured using hardware bootstraps. What bootstraps are you using for the two PHYs?
    Do you mind sharing the schematic?
    In the datasheet there is information on how to use the bootstraps and configure the PHY for the correct operation.

    The driver does not have RMII/MII configuration built into it. For the TLK PHY, the software configuration for MII/RMII is in register 0x17h.

    For MII, the PHY should go into by default with no external bootstraps. If you are trying to use RMII, then you will need to add and external bootstrap. The TLK110 RX_DV pin controls MII_MODE bootstrap (MII/RMII configuration).

    If operation in MII is required, add a 2.2k ohm pull-down resistor. If operation in RMII is required, add a 2.2K ohm pull-up resistor.

    Kind regards,
    Ross
  • Hi Ross,

    Thank you for reply.

    PHY1 is in RMII; MII_MODE pin is pulled up to 3v3 by 2k2.

    PHY0 is MMI;MII_MODE pin is connected to EMAC(AT91SAM9X25) through 27ohm resistor.

    Datasheet says bydefault PHY is in MII mode so no need to write 0x17h register.

    Kindly suggest if I am missing something.

    please check the schematic attachment.(note MDIO is pulled up;not shown in schematic)

  • Hi Vinayak,

    The SAM9X25 PB3 (RX_DV) has an internal Pull-Up. What I believe is occurring is the internal pull-up of the SAM9X25 and the internal pull-down of the TLK110 are competing. To ensure that the PHY gets into a pull-down state, I suggest adding a strong external pull-down resistor (2.2K). We say that a resistor is not required because there is an internal weak pull-down, but if you are attaching to a MAC with a stronger pull-up you will not enter into the correct configuration. If you do not want to do this fix in hardware, you can configure the PHY for MII operation by setting register 0x17 bit[5] = 0.

    Kind regards,
    Ross
  • HI Ross,

    PHY is initializing in MII mode;therefore as per datasheet register 0x17 bit 5 has no effect (please check attached snapshot from datasheet).

    Br,

    Vinayak

  • Hi Vinayak,

    Can you describe what the MII port is doing that is not OK? Are you unable to link with the MII port to a link partner? Can you not read the MDIO registers?

    As Ross suggested, strapping resistors are important to verify especially for mode selection. Can you dump registers 0x0 to 0x1f so we can see the configuration your MII PHY is strapping to?

    Best Regards,